Figure 3-2: Main Board (G-780009) Jumper Positioning; Table 3-7: Fpga Mode Selection (For Internal Tests Only); Table 3-8: Ground Voltage Pin Of Ad-Converter - NEC IE-78K0-NS-P04 User Manual

Emulation board and probe board
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IE-78K0-NS-P04, IE-780948-NS-EM4
<4> Connect the option board (G-78K0H) to the main board (G-780009).
<5> Setup of the emulation board (IE-78K0-NS-P04)
LCD - C/D resistor network
The 780948 Series has the possibility to use the LCD-C/D with the external resistor network or with
resistor as mask option.
A socket is delivered with the IE-780948-NS-EM4 for the mounting of the LCD-C/D resistor network.
This socket has to be plugged in the socket SO1 of the IE-78K0-NS-P04.
Jumper JP5
Jumper Position
Closed
Open
Jumper JP2
Jumper Position
Open
Closed
26

Figure 3-2: Main Board (G-780009) Jumper Positioning

Table 3-7: FPGA Mode Selection (for internal tests only)

ESN
G
Reserved
ND
Pull-up
Asynchronous Peripheral Mode (FPGA s are loaded by IE) (default)

Table 3-8: Ground Voltage Pin of AD-Converter

AAV
SS
Target
Connected to target selected ground base (default)
GND
Internal digital ground
JP8
JP7
JP6
JP4
JP3
JP2
Function
Function

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