Furuno FS-1570 Service Manual page 158

Receiver circuit
The receiver is protected by an arrester, CR4 and CR5 from 30 Vrms signal being
applied for more than 15 minutes.
When the preamplifier FAX-5 is used, jumper block J3 is put between #1 and #2 to
supply +12V to the preamplifier.
INST Signal
The T-CPU recognizes the presence of the W/R 2 board by receiving INST signal.
Table 5.6.1 lists DSC operation with and without W/R 2 board.
W/R 2 INST signal
Mounted Yes
Not mounted No
Self test
18 MHz test signal, modulated by mark and space signals, is applied to ANT IN line.
The stray capacitance between traces on the board couples the test signal. The level is
equal to SSG output of 70 to 80 dBuV. The receiver on DSC DSP board is also tested by
this signal.
Monitor sound of DSC signal
When the dot pattern is detected regardless of the call type, "IN COMING" appears in
the display. Then, AF MUTE signal is set to OFF to output the DSC receiving sound
from the loudspeaker. If the call is failed to receive or the unrelated call to the own
station is sent, the DSC receiving sound is set to MUTE.
DSC DSP always checks DSC signal.
Synchronization to DSC signal
Recognition of DSC signal: BY 5 bit dot pattern
Synchronization to DSC signal: The synchronization starts by receiving one of the
following synchronizing sequence signal patterns.
- 2 DX signals and 1 RX signal
- 1 DX signal and 2 RX signals
- 3 RX signals
Table 5.6.2 Functions with and without W/R2
DSC scan DSC ACK reception
W/R2 board W/R2 board
TX/RX board TX/RX board
5-41
5.6 W/R board (05P0734)
DSC self-test result display
RECV-2: OK/NG
Blank