Tables 1 Acronyms - Intel Core 2 Duo User Manual

Processor with the mobile intel 945gme express chipset
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About This Manual—Intel
Power-Good
Ringback
System Bus
Setup Window
Simultaneous Switching Output
Stub
Trunk
System Management Bus
Undershoot
V
(CPU core)
CC
Victim
Table 1
Table 1.
Acronyms (Sheet 1 of 3)
Acronym
AC
ACPI
AGTL
AMC
ASF
AMI
May 2007
Order Number: 317443-001US
Downloaded from StockCheck.com
945GME Express Chipset
"Power-Good," "PWRGOOD," or "CPUPWRGOOD" (an active high
signal) indicates that all of the system power supplies and clocks
are stable. PWRGOOD should go active a predetermined time
after system voltages are stable and should go inactive as soon
as any of these voltages fail their specifications.
The voltage to which a signal changes after reaching its
maximum absolute value. Ringback may be caused by
reflections, driver oscillations, or other transmission line
phenomena.
The System Bus is the microprocessor bus of the processor.
The time between the beginning of Setup to Clock (TSU_MIN)
and the arrival of a valid clock edge. This window may be
different for each type of bus agent in the system.
Simultaneous Switching Output (SSO) effects are differences in
electrical timing parameters and degradation in signal quality
caused by multiple signal outputs simultaneously switching
voltage levels in the opposite direction from a single signal or in
the same direction. These are called odd mode and even mode
switching, respectively. This simultaneous switching of multiple
outputs creates higher current swings that may cause additional
propagation delay ("push-out") or a decrease in propagation
delay ("pull-in"). These SSO effects may impact the setup and/
or hold times and are not always taken into account by
simulations. System timing budgets should include margin for
SSO effects.
The branch from the bus trunk terminating at the pad of an
agent.
The main connection, excluding interconnect branches, from
one end
A two-wire interface through which various system components
may communicate.
The minimum voltage extending below VSS observed for a
signal at the device pad.
V
(CPU core) is the core power for the processor. The system
CC
bus is terminated to V
A network that receives a coupled crosstalk signal from another
network is called the victim network.
defines the acronyms used throughout this document.
Audio Codec
Advanced Configuration and Power Interface
Assisted Gunning Transceiver Logic
Audio/Modem Codec.
Alert Standard Format
American Megatrends Inc. (BIOS developer)
®
Intel
Core
(CPU core).
CC
Definition
TM
2 Duo processor with the Mobile Intel
®
945GME Express Chipset
Manual
11

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