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ETAS ES1650.1 User Manual

Piggyback carrier board
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ES1650.1 Piggyback Carrier Board
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  • Page 1 ES1650.1 Piggyback Carrier Board User’s Guide...
  • Page 2 Copyright The data in this document may not be altered or amended without special notification from ETAS GmbH. ETAS GmbH undertakes no further obligation in relation to this document. The software presented herein is provided on the basis of a general license agreement or a single license. Using and copying is only allowed in concurrence with the specifications stipulated in the contract.

  • Page 3: Table Of Contents

    ES1650.1 Hardware ........
  • Page 4 2.4.2 Output Voltage Range ....... 24 2.4.3 Digital/Analog Converter ......24 2.4.4 Control Interface .
  • Page 5 Pin Assignment ..........71 7.5.1 ES1650.1 X1 Front-Facing Connector ....71 7.5.2 WRAP1 Connector .
  • Page 6 8 ETAS Contact Addresses ........

  • Page 7: Introduction

    VME system. Features The ES1650.1 Piggyback Carrier Board is used in VMEbus systems as a carrier board for piggybacks. The board can hold two piggybacks. There are piggy- backs for a variety of tasks, such as digital and analog input and output mod- ules as well as relay modules with switching capability.

  • Page 8: Fig. 1-1 Es1650.1 Piggyback Carrier Board Front Panel

    The following figure shows the front panel of the carrier board and the posi- tion of the front panel connectors. ES1650.1 Fig. 1-1 ES1650.1 Piggyback Carrier Board Front Panel Introduction...

  • Page 9: Block Diagram

    Front Panel Fig. 1-2 ES1650.1 Block Diagram The 50-pin connector is visible on the left side of the front panel. It is wired to the two piggybacks. The VMEbus interface is located on the extreme right. This interface converts the signals of the VMEbus into data, address, and control signals for the piggybacks.
  • Page 10 Introduction...

  • Page 11: Es1650.1 Hardware

    ES1650.1 Hardware This section provides a detailed overview of the features of the ES1650.1 Pig- gyback Carrier Board. You will find information on the following subjects: • carrier for piggybacks • external local reset 1.3.1 Carrier for Piggybacks The ES1650.1 Piggyback Carrier Board is used in VMEbus systems as a carrier for piggybacks.
  • Page 12 Connect pins 1 and 2 of jumper B20 if you are not using the external reset and leave pins 9 and 42 disconnected. If you use more than one ES1650.1 Piggyback Carrier Board in a system and wish to use a common local reset for all boards, you can connect the corre- sponding pins of the boards in series with the relays.

  • Page 13: Hardware Configuration

    ES1650.1 Position of the Jumpers (Component Side) 1.4.1 VMEbus Base Address The base address of the ES1650.1 Piggyback Carrier Board is selected by the five jumpers B2, B12, B13, B14, and B15. note Make sure that the address range of the ES4120 board does not overlap address...

  • Page 14: Tab. 1-1 Assignment Of Jumper And Address Line

    If you chose an address block size of 256 bytes, you can use 32 different address settings in the range $FE0400 to $FEFC00. For an address block size of 8 KBytes, jumpers B14 and B15 are ignored. This provides only eight address settings.

  • Page 15: Tab. 1-2 Base Address And Jumper Configuration

    Address Range 0xFE7C00 - 0xFE7CFF 0xFE8400 - 0xFE84FF 0xFE8C00 - 0xFE8CFF 0xFE9400 - 0xFE94FF 0xFE9C00 - 0xFE9CFF 0xFEA400 - 0xFEA4FF 0xFEAC00 - 0xFEACFF 0xFEB400 - 0xFEB4FF 0xFEBC00 - 0xFEBCFF 0xFEC400 - 0xFEC4FF 0xFECC00 - 0xFECCFF 0xFED400 - 0xFED4FF 0xFEDC00 - 0xFEDCFF 0xFEE400 - 0xFEE4FF 0xFEEC00 - 0xFEECFF 0xFEF400 - 0xFEF4FF...

  • Page 16: Size Of The Address Range

    1.4.2 Size of the Address Range The size of the address range occupied by the ES1650.1 Piggyback Carrier Board in your system is selected by jumper B16. You can choose between the sizes 265 bytes and 8 KBytes. The size that needs to be set depends on the piggybacks used.

  • Page 17: Pin Assignment

    Pin Assignment This section describes the pin assignments of the ES1650.1 Piggyback Carrier Board. Fig. 1-6 ES1650.1 Pin Assignments on the Front Panel In the table below, the letter in the "Piggyback Pin" column indicates the posi- tion of the piggyback. "A" designates the upper, "B" the lower piggyback.
  • Page 18 ES1650.1 Pin Assignment note The components as well as the component and solder sides of the ES1650.1 Piggyback Carrier Board and its piggybacks may carry dangerous high voltages. These dangerous voltages may even exist if the VMEbus system is powered off or the ES1650.1 Piggyback Carrier Board has been removed.

  • Page 19: Technical Data

    Technical Data This section contains the technical data of the ES1650.1 Piggyback Carrier Board in tabular form. VMEbus Type Slave interface Address and data lines 24-bit address and 16-bit data, or 16-bit address and 16-bit data Base address $FE0400 to $FEFC00 selected by jumpers...
  • Page 20 Physical Dimensions Circuit board 100 x 160 mm² Front panel Height: 3 U Width: 4 HP (20.3 mm)

  • Page 21: Pb1650Dac1.1 D/A Piggyback (4 Channels)

    Features The PB1650DAC1.1 piggyback is used to generate analog output signals in VMEbus systems in conjunction with the ES1650.1 Piggyback Carrier Board. The module has the following features: •...

  • Page 22: Block Diagram

    Logic Address and Data Control Signals ES1650.1 Fig. 2-1 PB1650DAC1.1 Block Diagram At the bottom left of the block diagram, you see the control interface of the piggyback that on the one hand is connected with the VMEbus and passes data and the clock signal to the digital/analog converter through an optocoupler.

  • Page 23: Pb1650Dac1.1 Hardware

    PB1650DAC1.1 Hardware This section gives you a detailed overview of the features of the PB1650DAC1.1 piggyback. You will find information on the following subjects: • signal conditioning • output voltage range • digital/analog converter • control interface • size of the address range The following figure shows the position of the components of the PB1650DAC1.1 piggyback.

  • Page 24: Output Voltage Range

    The figure shows channel A as an example of how the output stage is realized. 10 VRef VRefA ChannelA 10 KW AOUT 20 KW 20 KW Fig. 2-3 Output Circuit of the D/A Converters The voltages of the reference output A and channel A are each generated by an output of the A/D converter.

  • Page 25: Configuration

    The B16 jumper on the ES1650.1 carrier board has to be open for this address range size. Configuration The PB1650DAC1.1 piggyback has four groups of solder straps on the solder side, one group for each output channel. They are used to select the unipolar or bipolar mode for the output voltage.

  • Page 26: Pin Assignment

    Pin Assignment The pin assignment of the X1 front connector of the ES1650.1 Piggyback Carrier Board depends on whether the piggyback is mounted in position A (top) or in position B (bottom). The following two tables explain each of the two possible pin layouts.

  • Page 27: Technical Data

    Signal X1 Pin Signal X1 Pin CGND DOUT DGND DGND Open Open Open Open Open Open Open Open Open Open Open Open Tab. 2-3 Pin Assignment of the PB1650DAC1.1 - Piggyback in Position B Technical Data This sections contains the technical data of the PB1650DAC1.1 digital/analog converter piggyback in tabular form.
  • Page 28 Analog Output Output voltage in unipolar 0 V to +10 V for each output selected by solder straps mode Output voltage in bipolar -10 V to +10 V for each output selected by solder mode straps Output current Max. 2 mA per channel Power Supply Piggyback +5 V DC, ±5 %, max.

  • Page 29: Pb1650Dio1.1 Digital I/O Piggyback (8/8 Channels)

    (max. 500 mA) • its own ID byte Applications The PB1650DIO1.1 piggyback is used in conjunction with the ES1650.1 Piggy- back Carrier Board in VMEbus systems for capturing and generating binary switching signals. Examples of applications are: •...

  • Page 30: Block Diagram

    ID Byte Address and Data Control Signals ES1650.1 Fig. 3-1 PB1650DIO1.1 Block Diagram In the top center, you can see the electrical isolation separating the 16 input and output channels from each other and from the VMEbus system. Below it, you find the module-internal control unit.

  • Page 31: Pb1650Dio1.1 Hardware

    Inputs The input area consists of one opto-isolated input with current limitation and one input buffer to the ES1650.1 interface. There are eight parallel input channels in groups of two channels sharing one common ground per group. The input voltage range is a max. of 80 V DC.

  • Page 32: Outputs

    The channels 1 and 2, 3 and 4, 5 and 6, 7 and 8 each share a common ground port. INn+ 7,5 V Current Limitation INn- PB1650DIO1.1 Fig. 3-3 Input Circuit of the PB1650DIO1.1 3.4.2 Outputs The output driver consists of a bipolar transistor switch, an optocoupler, and a safety diode.

  • Page 33: Power On State

    3.4.5 Size of the Address Range The size of the address range occupied by the PB1650DIO1.1 in your system is 256 bytes. The B16 jumper on the ES1650.1 Piggyback Carrier Board has to be open for this address range size.

  • Page 34: Configuration

    The PB1650DIO1.1 piggyback has no jumpers or solder straps that need to be configured. Pin Assignment The pin assignment of the ES1650.1 Piggyback Carrier Board depends on whether the piggyback is mounted in position A (top) or in position B (bottom).

  • Page 35: Technical Data

    Signal X1 Pin Signal X1 Pin OUT1+ IN1+ OUT2+ IN2+ OUT3+ IN3+ OUT4+ IN4+ OUT5+ IN5+ OUT6+ IN6+ OUT7+ IN7+ OUT8+ IN8+ OUT5/6- IN1/2- OUT3/4- IN3/4- OUT1/2- IN5/6- OUT7/8- IN7/8- Tab. 3-2 Pin Assignment of the PB1650DIO1.1 - Piggyback in Position B (Bottom) Technical Data This section contains the technical data of the PB1650DIO1.1 piggyback in...
  • Page 36 Digital Outputs Output channels Eight, opto-isolated, every two channels having one common ground Output voltage 0 to 80 V DC Supply voltage for exter- 5 to 80 V DC nal pull-up resistance Output current 500 mA max. Channel Properties Input frequency 6.5 kHz max.

  • Page 37: Pb1650Dio2.1 Digital I/O Piggyback (10/10 Channels)

    • its own ID byte Applications The PB1650DIO2.1 piggyback is used in conjunction with the ES1650.1 Piggyback Carrier Board in VMEbus systems for capturing and generating binary switching signals with TTL signal levels. Examples of applications are: •...

  • Page 38: Block Diagram

    ID Byte Address and Data Control Signals ES1650.1 Fig. 4-1 PB1650DIO2.1 Block Diagram In the top center, you can see the dc decoupling electrically separating the 16 input and output channels and the four control lines from the VMEbus system.

  • Page 39: Pb1650Dio2.1 Hardware

    The input area consists of one dc decoupled input and one input buffer to the ES1650.1 interface. There are eight parallel input channels and two parallel control lines. The two control lines, H1E and H3E, can either be configured as...

  • Page 40: Outputs

    The following figure shows the allocation of an input channel. External Supply Voltage (Common) 330 W 330 W PB0IN PB7IN H1IN H3IN PB1650DIO2.1 Fig. 4-3 Input Circuit of the PB1650DIO2.1 The input current must not exceed 10 mA. The input circuit does not invert. Input levels <1.5 V are interpreted as a logical 0 (low), and input levels >3.0 V as a logical 1 (high).

  • Page 41: Power On State

    4.4.5 Size of the Address Range The size of the address range occupied by the PB1650DIO2.1 in your system is 256 bytes. The B16 jumper on the ES1650.1 Piggyback Carrier Board has to be open for this address range size.

  • Page 42: Configuration

    The PB1650DIO2.1 piggyback has no jumpers or solder straps that need to be configured. Pin Assignment The pin assignment of the 50-pin front-facing connector of the ES1650.1 Piggyback Carrier Board depends on whether the piggyback is mounted in position A (top) or in position B (bottom).

  • Page 43: Tab. 4-2 Pin Assignment Of The Pb1650Dio2.1 - Piggyback In Position B (Bottom)

    Signal X1 Pin Signal X1 Pin PB0 OUT PB0 IN PB1 OUT PB1 IN PB2 OUT PB2 IN PB3 OUT PB3 IN PB4 OUT PB4 IN PB5 OUT PB5 IN PB6 OUT PB6 IN PB7 OUT PB7 IN H2E OUT H1E IN H4E OUT H3E IN...

  • Page 44: Technical Data

    Technical Data This section contains the technical data of the PB1650DIO2.1 piggyback in tabular form. Digital Inputs Input channels Eight, dc decoupled, two control lines, opto-isolated Input voltage 5 V DC Switching level <1.5 V = low >3.0 V = high Input current 10 mA at 5 V Digital Outputs...
  • Page 45 Physical Dimensions Length 100 mm Width 48 mm Depth 12 mm...

  • Page 47: Pb1650Adc1.1 A/D Piggyback (8 Channels)

    Features The PB1650ADC1.1 piggyback is used for analog data acquisition in VMEbus systems in conjunction with the ES1650.1 Piggyback Carrier Board. The mod- ule is designed for medium resolutions and small to medium data rates. It has the following features: •...

  • Page 48: Block Diagram

    (i.e. fully electrically isolated) and from there to the VMEbus interface of the basic board. The control logic is part of the piggyback. It controls the converters and shift registers, passing the data to the ES1650.1 Piggyback Carrier Board. PB1650ADC1.1 A/D Piggyback (8 Channels)

  • Page 49: Pb1650Adc1.1 Hardware

    PB1650ADC1.1 Hardware This section gives you a detailed overview of the features of the PB1650ADC1.1 piggyback. The following subjects are explained: • signal conditioning • input voltage range and gain • analog/digital converter • control interface • ID byte • size of the address range The following figure shows the position of the components on the piggyback.

  • Page 50: Input Voltage Range And Gain

    Size of the Address Range The size of the address range occupied by the PB1650ADC1.1 in your system is 256 bytes. The B16 jumper on the ES1650.1 Piggyback Carrier Board has to be open for this address range size. Configuration This section contains the information for configuring the solder straps of the PB1650ADC1.1 piggyback.

  • Page 51: Input Voltage Range

    The figure below shows the position of the solder straps on the solder side of the board. Serial Shift Register Calibration Unit Fig. 5-3 PB1650ADC1.1 Solder Side with Solder Straps 5.5.1 Input Voltage Range The following table describes the function of each solder strap. Input Channel Solder Strap Position Input Voltage Range...

  • Page 52: Offset Voltage

    Tab. 5-2 Offset Voltage of the PB1650ADC1.1 Pin Assignment The pin assignment of the X1 front connector of the ES1650.1 Piggyback Car- rier Board depends on whether the piggyback is mounted in position A (top) or in position B (bottom).

  • Page 53: Tab. 5-4 Pin Assignment Of The Pb1650Adc1.1 - Piggyback In Position B

    Signal X1 Pin Signal X1 Pin A6(+) B6(-) A7(+) B7(-) Ext. reset Ext. reset supply voltage Ground Ground Ground Ground Ground Ground Ground Ground Tab. 5-3 Pin Assignment of the PB1650ADC1.1 - Piggyback in Position A Signal X1 Pin Signal X1 Pin A0(+) B0(-)

  • Page 54: Technical Data

    Technical Data This section contains the technical data of the PB1650ADC1.1 analog/digital converter piggyback in tabular form. Analog/Digital Converter Resolution 12-bit Conversion delay 43 µs Sampling rate 20 kHz Linearity +/-0.75 LSB Analog Input Analog channels Input resistance In the 5 V range: 20 KW In the 10 V range: 40 KW Overvoltage protection +/- 35 V continuous...

  • Page 55: Pb1650Rel1.1 Relay Piggyback (8 Channels)

    VME system is powered off. Make sure that the piggyback is protected against contact during its operation. Disconnect all connections to the ES1650.1 Piggyback Carrier Board before removing the plug-in board from the VME system. Features This piggyback provides eight electrically isolated switches in the voltage range up to 175 V.

  • Page 56: Block Diagram

    In addition, the PB1650REL1.1 has its own ID, as can be seen on the extreme left of the block diagram. This end of the board is also where the board is connected to the VMEbus via the interface to the ES1650.1 Piggyback Carrier Board.

  • Page 57: Pb1650Rel1.1 Hardware

    PB1650REL1.1 Hardware This section gives you a detailed overview of the features of the PB1650REL1.1 piggyback. You will find information on the following subjects: • relays • output voltage range ID byt • e and address • size of the address range The following figure shows the position of the components on the component side of the piggyback.

  • Page 58: Id Byte

    Size of the Address Range The size of the address range occupied by the PB1650REL1.1 in your system is 256 bytes. The B16 jumper on the ES1650.1 Piggyback Carrier Board has to be open for this address range size. Configuration The PB1650REL1.1 piggyback has no jumpers or solder straps that need to be...

  • Page 59: Technical Data

    Signal X1 Pin Signal X1 Pin Relay 7 NC Relay 7 NO Relay 0 Pole Relay 4 Pole Relay 1 Pole Relay 5 Pole Relay 2 Pole Relay 6 Pole Relay 3 Pole Relay 7 Pole Ext. reset Ext. reset supply voltage Tab.
  • Page 60 Outputs Number of 8 (electrically isolated) output channels Switching voltage Max. 175 V DC Switching current Max. 250 mA Switching power Max. 3 W per relay Switching time < 3 msec Power Supply Supply voltage +5 V (±5 %) Supply current 100 mA + 22.5 mA per activated channel Environmental Conditions Ambient temperature...

  • Page 61: Pb1650Prt1.1 Prototyping Piggyback

    The PB1650PRT1.1 Prototyping Piggyback takes up both slots for piggybacks on the ES1650.1 Piggyback Carrier Board. Applications The PB1650PRT1.1 Prototyping Piggyback is used in conjunction with the ES1650.1 Piggyback Carrier Board in VMEbus systems to develop various circuits. Examples of application areas are: •...
  • Page 62 PB1650PRT1.1 Block Diagram At the top of the diagram you can see the X1 connector and the inputs and outputs of the ES1650.1 Piggyback Carrier Board. If you develop circuits with the ES4060.1 Processor Module, the signals are transferred to the VMEbus interface on the carrier board via the processor module and the Dual-Ported RAM (DPRAM).

  • Page 63: Fig. 7-2 Mechanical Structure Of The Es1650.1, Pb1650Prt1.1 And Es4060.1

    The figure below shows a side view of the mechanical structure of the three circuits on the board. Front Panel ES4060.1 PB1650PRT1.1 ES1650.1 Fig. 7-2 Mechanical Structure of the ES1650.1, PB1650PRT1.1 and ES4060.1 PB1650PRT1.1 Prototyping Piggyback...
  • Page 64 PB1650PRT1.1 Prototyping Piggyback...

  • Page 65: Pb1650Prt1.1 Hardware

    PB1650PRT1.1 Hardware This section gives you a detailed overview of the features of the PB1650PRT1.1 Prototyping Piggyback. You will find information on the following subjects: • supply voltages • interfaces • Dual-Ported RAM access • size of the address range The following figure shows the position of the components on the component side of the prototyping piggyback.

  • Page 66: Supply Voltages

    The supply voltages are not protected against short-circuits and overvoltage. Short-circuits on the wrap area or on the front-facing connector can damage the PB1650PRT1.1, the ES1650.1 Piggyback Carrier Board and the ES4060.1 Proces- sor Module. To avoid damage to the components, make sure that the circuits on the proto-...

  • Page 67: Vmebus Interface

    VMEbus Interface There is direct access to the 4-KByte Dual-Ported RAM area via the VMEbus interface. The address range within the VMEbus address range is determined by the configuration of the base address of the ES1650.1 Piggyback Carrier Board. 7.3.3 Dual-Ported RAM Access The data is transferred between the VMEbus and the PB1650PRT1.1 module...

  • Page 68: Size Of The Address Range

    Size of the Address Range The size of the address range occupied by the PB1650PRT1.1 in your system is 8 KBytes. The B16 jumper on the ES1650.1 Piggyback Carrier Board has to be closed for this address range size. Configuration This section contains information on configuring the jumpers of the PB1650PRT1.1 Piggyback.

  • Page 69: B501 Jumper

    7.4.1 B501 Jumper The write protection of the serial Flash memory is configured with jumper B501. B501 Jumper Means Pin 1-2 closed Programming of the serial Flash memory with the ES4060.1 Processor Module or via the programming interface Pin 3-2 closed Programming of the serial Flash memory only via the programming interface Tab.

  • Page 70: St4 Jumper Strip

    ST4 Jumper Strip The ST4 jumper strip configures the connection of the signals of the ES4060.1 Processor Module to the X1 front-facing connector of the ES1650.1 Piggyback Carrier Board. A connector that is plugged in means that the relevant signal of the ES4060.1 Processor Module is transferred to the selected pin of the front-...

  • Page 71: Pin Assignment

    ES1650.1 X1 Front-Facing Connector The table in this section contains the pin assignment of the 50-pin front-facing connector X1 of the ES1650.1 Piggyback Carrier Board as well as information on the signals of the ES4060.1 Processor Module, the assignment of the associated pin of the ST4 jumper strip, the associated pin of the WRAP3 connector and the assignment of the relevant WRAP connector and its pin.

  • Page 72: Fig. 7-6 X1 Front-Facing Connector

    Fig. 7-6 X1 Front-Facing Connector Fig. 7-7 WRAP3 Wrap Area...

  • Page 73: Fig. 7-8 St4 Jumper Strip

    Fig. 7-8 ST4 Jumper Strip X1 Pin Signal of the Associated Pin Associated Pin WRAP ES4060.1 when of the ST4 of the WRAP3 Connector Jumper Closed Jumper Strip Connector and Pin n. c. n. c. n. c. (fixed) PDA0 Wrap2 Pin 66 PDA1 Wrap2 Pin 65 PDA2...
  • Page 74 X1 Pin Signal of the Associated Pin Associated Pin WRAP ES4060.1 when of the ST4 of the WRAP3 Connector Jumper Closed Jumper Strip Connector and Pin PDA4 Wrap2 Pin 62 PDA5 Wrap2 Pin 61 PDA6 Wrap2 Pin 60 Reset/GND n. c. n.
  • Page 75 X1 Pin Signal of the Associated Pin Associated Pin WRAP ES4060.1 when of the ST4 of the WRAP3 Connector Jumper Closed Jumper Strip Connector and Pin PANA13 Wrap1 Pin 44 PANA14 Wrap1 Pin 45 PANA15 Wrap1 Pin 46 User-defined n. c. n.

  • Page 76: Wrap1 Connector

    7.5.2 WRAP1 Connector Processor module signals are made available on the wrap area via the WRAP1 connector. Fig. 7-9 Pin Assignment of WRAP1, WRAP2 and WRAP4 Signal Signal VCC +5 V VCC +5 V VCC +3.3 V n. c. VCC +3.3 V n.
  • Page 77 Signal Signal /PPORESET n. c. PCLKOUT n. c. PECK n. c. VDD15 PANB0 PANB1 PANB2 n. c. PANB3 n. c. PANB4 n. c. PANB5 n. c. PANB6 n. c. PANB7 n. c. PANB8 n. c. PANB9 n. c. PANB10 n. c. PANB11 n.

  • Page 78: Wrap2 Connector

    7.5.3 WRAP2 Connector Processor module bus signals are made available on the wrap area via the WRAP2 connector. (For details of the pin assignment see the section "Pin Assignment of WRAP1, WRAP2 and WRAP4" on page 76) Signal Signal PA23 n.

  • Page 79: Wrap4 Connector

    Signal Signal /QCS2 n. c. /QCS1 n. c. /BPIRQ7 PDA8 PDA7 PDA6 PDA5 PDA4 PDA3 PDA2 PDA1 PDA0 PETRIG1 PETRIG2 Reserved n. c. Reserved n. c. Tab. 7-6 Pin Assignment of the PB1650PRT1.1 - WRAP2 Connector 7.5.4 WRAP4 Connector Signals of the processor module are made available on the wrap area via the WRAP4 connector.

  • Page 80: St500 Connector

    Signal Signal PTPUB10 n. c. PTPUB11 n. c. PTPUB12 n. c. PTPUB13 n. c. PTPUB14 n. c. PTPUB15 n. c. Tab. 7-7 Pin Assignment of the PB1650PRT1.1 - WRAP4 Connector 7.5.5 ST500 Connector Signals for programming serial Flash memories and PLD are made available via the ST500 connector.

  • Page 81: Technical Data

    Technical Data This section contains the technical data of the PB1650PRT1.1 piggyback in tabular form. Electrical Data Supply voltages for prototype +3.3 V; +5 V circuits and ES4060 Supply current for prototype Max. 250 mA at +3.3 V circuits and ES4060 Max.

  • Page 83: Etas Contact Addresses

    +33 (1) 56 70 00 51 94588 Rungis Cedex E-mail: sales@etas.fr France WWW: www.etas.fr Great Britain ETAS Engineering Tools Application and Services Ltd. Studio 3, Waterside Court Phone: +44 (0) 1283 - 546512 3rd Avenue, Centrum 100 Fax: +44 (0) 1283 - 548767 Burton-upon-Trent E-mail: sales@etas-uk.net...
  • Page 84 Korea ETAS Korea Co. Ltd. 3F, Samseung Bldg. Phone: +82 (2) 5747 016 61-1, Yangjae-dong Fax: +82 (2) 5747 120 Seocho-gu E-mail: sungik.hong@etas.co.kr Seoul Republic of Korea North America ETAS Inc. 3021 Miller Road Phone: +1 (888) ETAS INC Ann Arbor, MI 48103...

  • Page 85: List Of Figures

    Local Reset for Several Carrier Boards............12 Fig. 1-5 ES1650.1 Position of the Jumpers (Component Side)....... 13 Fig. 1-6 ES1650.1 Pin Assignments on the Front Panel ......... 17 Fig. 2-1 PB1650DAC1.1 Block Diagram..............22 Fig. 2-2 Component Side of the PB1650DAC1.1..........23 Fig.
  • Page 86 Component Side of the PB1650REL1.1 ........... 57 Fig. 7-1 PB1650PRT1.1 Block Diagram ..............62 Fig. 7-2 Mechanical Structure of the ES1650.1, PB1650PRT1.1 and ES4060.1..63 Fig. 7-3 Component Side of the PB1650PRT1.1 ..........65 Fig. 7-4 Solder Side of the PB1650PRT1.1 ............66 Fig.

  • Page 87: List Of Tables

    Base Address and Jumper Configuration ..........14 Tab. 1-3 Base Address and Jumper Configuration ..........15 Tab. 1-4 ES1650.1 Pin Assignment................ 17 Tab. 2-1 Output voltage range of the PB1650DAC1.1 .......... 25 Tab. 2-2 Pin Assignment of the PB1650DAC1.1 - Piggyback in Position A ..... 26 Tab.
  • Page 88 Tab. 7-4 Pin Assignment of the PB1650PRT1.1............73 Tab. 7-5 Pin Assignment of the PB1650PRT1.1 - WRAP1 Connector...... 76 Tab. 7-6 Pin Assignment of the PB1650PRT1.1 - WRAP2 Connector...... 78 Tab. 7-7 Pin Assignment of the PB1650PRT1.1 - WRAP4 Connector...... 79 Tab.

  • Page 89: Index

    Index A/D converter 50 Component side Address modifier 16 PB1650ADC1.1 49 Address range PB1650DIO1.1 31 ES1650.1 16 PB1650DIO2.1 39 Applications PB1650PRT1.1 65 PB1650DIO2.1 37 PB1650REL1.1 57 PB1650PRT1.1 61 Configuration PB1650ADC1.1 50 PB1650DAC1.1 25 PB1650DIO2.1 42 Base address 13 PB1650PRT1.1 68...
  • Page 90 Data ES1650.1 19 PB1650ADC1.1 PB1650ADC1.1 54 block diagram 48 PB1650DAC1.1 27 component side 49 PB1650DIO1.1 35 configuration 50 PB1650DIO2.1 44 pin assignment 52 PB1650PRT1.1 81 size of the address range 50 PB1650REL1.1 59 solder side 51 Dual-ported RAM access 67 technical data 54 PB1650DAC1.1...
  • Page 91 PB1650PRT1.1 WRAP2 78 applications 61 PB1650PRT1.1 - ST500 connector 80 assignment of ES1650.1 X1 71 PB1650PRT1.1 - WRAP4 connector 79 B501 jumper 69 PB1650PRT1.1 WRAP1 connector 76 block diagram 62 PB1650REL1.1 58 block diagram - signals from X1 70 Power ON state component side 65 PB1650DIO2.1 41...

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