Table of Contents
Advertisement
Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.8.4
Audio: Lip Sync (Optional)
A "lip sync" circuit with an audio delay can be added (not for all
models/regions), in order to synchronise with video delay due
to the complexity of the display processing. This video delay is
significant, due to memory based processing. For instance, the
"frame rate conversion" cause a delay of two frames, while the
LCD panel response also cause a delay.
The circuit is a (16 bit) FIFO based digital delay. E.g.: the
memory size required for a 80 ms delay (with a data clock of
1.024 MHz) can be calculated with: Memory size = delay time
* f_clk. This gives: 80 ms * 1.024 MHz = 81920 bits.
To calculate the memory size for a 16 bits mode I2S digital
audio stream we must use the following data:
•
f_s = 32 kHz, 16 bits, stereo
•
Data clock = 32 kHz * 16 * 2 = 1.024 MHz
•
Memory size for 1 ms delay = 1 ms * 1.024 MHz = 1024 bits
= 1 kbit
So, the delay time of 80 ms can be built with five steps of 16
ms, which is close to the frame rate. Therefore, a 128 kbit
SRAM (16 x 8) is chosen.
Note that above described calculation is just an example,
values in the set can deviate.
9.9
Control
9.9.1
Hercules
The System Board has two main micro-controllers on board.
These are:
•
On-chip x86 micro-controller (OCM) from Genesis LCD TV/
Monitor Controller.
•
On-chip 80C51 micro-controller from Philips
Semiconductor UOCIII (Hercules) series.
Each micro-controller has it own I
internal devices.
The Hercules is integrated with the Video and Audio Processor.
For dynamic data storage, such as SMART PICTURE and
SMART SOUND settings, an external NVM IC is being used.
Another feature includes an optional Teletext/Closed Caption
decoder with the possibility of different page storage depending
on the Hercules type number.
The Micro Controller ranges in ROM from 128 kB with no TXT-
decoder to 128 kB with a 10 page Teletext or with Closed
Caption.
9.9.2
Block Diagram
The block diagram of the Micro Controller application is shown
below.
2
C bus which host its own
LC4.6E AA
IIC BUS1
Tuner
ComPair
Sound
NVM
Amp
NVM_WP
Sound_Enable
HREC
127
111
104
P1.4
P2.0
P0.2
RST
Sel IF/
114
SDM
P2.3
SDA 109
116
SCL 108
ADC1
Status1
115
HERCULES
ADC0
INT1 98
Light
Sense
P1.1 99
ADC3 120
123
P2.5
126
97
102
122
128
INT2
INT0
P0.4
P2.4
P1.5
P50_LINE_ITV_IR_SW
RC
MUX
Standby
POWER
EXT_MUTE
TV_IR
DOWN
Figure 9-5 Micro Controller block diagram
9.9.3
Basic Specification
The Micro Controller operates at the following supply voltages:
•
+3.3 V
at pins 4, 88, 94, and 109.
DC
•
+1.8 V
at pins 93, 96, and 117.
DC
2
•
I
C pull up supply: +3.3V
9.9.4
Pin Configuration and Functionality
The ports of the Micro Controller can be configured as follows:
•
A normal input port.
•
An input ADC port.
•
An output Open Drain port.
•
An output Push-Pull port.
•
An output PWM port.
•
Input/Output Port
The following table shows the ports used for the L04 control:
Table 9-1 Micro Controller ports overview
Pin
Name
97
INT0/ P0.5
98
P1.0/ INT1
99
P1.1/ T0
2
102 P0.4/ I
SWS
2
103 P0.3/ I
SCLK
2
104 P0.2/ I
SDO2 NVM_WP
2
105 P0.1/ I
SDO1 Lip Sync
2
106 P0.0/ I
SDI/O Lip Sync
107 P1.3/ T1
108 P1.6/ SCL
109 P1.7/ SDA
111 P2.0/ TPWM
112 P2.1/ PWM0
113 P2.2/ PWM1
114 P2.3/ PWM2
115 P3.0/ ADC0
116 P3.1/ ADC1
119 P3.2/ ADC2
120 P3.3/ ADC3
122 P2.4/ PWM3
123 P2.5/ PWM4
126 P1.2/ INT2
127 P1.4/ RX
128 P1.5/ TX
The description of each functional pin is explained below:
9.
EN 79
IIC BUS 2
GPROBE for Debug
or ComPair(Scaler)
NVM
1407
1406
1405
NVM_WP
93
92
83
72
71
194
193
187
NVRAM
NVRAM
GPIO2
85
_SDA
_SCL
(GPIO4)
88
SDA
(GPIO5)
78 DDC_SDA_VGA
89
(GPIO6)
SCL
77 DDC_SCL_VGA
68
TV_IRQ
(PBIAS)
82 GPIO1
SCALER
TV_SC_COM
67
81 GPIO0
(PPWR)
99
Keyboard
(PWM1)
POWER_DOWN
98
BACK_LIGHT_ADJ1
90 GPIO7
(GPIO11/
PWM0)
111
ROM_DATA0-7
103 106 107 108
GPIO23
5 6 7
ROM_ADD0-17
+3V3STBY
Flash ROM
HIGH or
LOW
level input
.
DC
Description
Configuration
IR
INT0
TV_IRQ
INT2
TV_SC_COM
P1.1
EXT_MUTE
P0.4
2
Lip Sync
I
SCLK
P0.2
2
I
SDO1
2
I
SDI/O
PC-TV_LED
P1.3
SCL
SCL
SDA
SDA
SOUND_ENABLE
P2.0
(for future use)
-
(for future use)
-
SEL_IF
P2.3
Light Sensor - SDM
ADC0
STATUS_1
ADC1
STATUS_2
ADC2
KEYBOARD
ADC3
STANDBY
P2.4
(for future use)
-
(for future use)
-
HERC_RESET
-
POWER_DOWN
P1.5
+3V3STBY
PC_DET
SD_PCHD_SEL
PC_HD_SEL
LAMP_ON_OFF
PANEL_PWR_CTL
HD_FILTER
E_14490_062.eps
160904
Advertisement
Table of Contents
