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AWARD BIOS SETUP
determined by the system board manufacturer for the installed DRAM. This value is
access speed, so a lower value means a faster system.
EDO CASx# MA Wait State : The system board designer may elect to insert a wait state
into EDO CASx# Memory addressing cycle, if necessary.
CAS stands for Column
Address Select.
EDO RASx# Wait State : The system board designer may elect to insert a wait state into
EDO RASx# Memory addressing cycle, if necessary. RAS stands for Row Address
Select.
SDRAM RAS to CAS Delay : This field lets you insert a timing delay between the CAS
and RAS strobe signals, used when DRAM is written to, read from, or refreshed. Fast
gives faster performance; and Slow gives more stable performance. This field applies
only when synchronous DRAM is installed in the system.
SDRAM RAS Precharge Time : If insufficient number of cycles is allowed for the RAS to
accumulate its charge before DRAM refresh, the refresh may be incomplete and the
DRAM may fail to retain data. Fast gives faster performance; and Slow gives more
stable performance. This field applies only when synchronous DRAM is installed in the
system.
SDRAM RAS Precharge Control : When Enabled, all CPU cycles to SDRAM result in
an All Banks Precharge Command on the SDRAM interface.
SDRAM CAS Latency Time : When synchronous DRAM is installed, the number of
clock cycles of CAS latency depends on the DRAM timing. Do not reset this field from
the default value specified by the system designer.
DRAM Data Integrity Mode : Select Parity or ECC (error-correcting code), according to
the type of installed DRAM.
System BIOS Cacheable : Selecting Enabled allows caching of the system BIOS ROM
at F0000h-FFFFFh, resulting in better system performance. However, if any program
writes to this memory area, a system error may result.
Video BIOS Cacheable : Selecting Enabled allows caching of the video BIOS ROM at
C0000h to C7FFFh, resulting in better video performance. However, if any program
AP-687VF/F 39
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