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Chapter 6: BIOS
tRWSR Relaxation
If this feature is set to Enabled, the tRWSR overrides the SPD. If this feature is set to
Disabled, it is enforced based on memory frequency. The options are Enable and Disable.
Enable ADR
Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Disable and Enable.
Memory Topology
This item displays the information of onboard memory modules as detected by the
BIOS.
Memory RAS (Reliability_Availability_Serviceability) Configuration
Use this submenu to configure the following Memory RAS settings.
Mirror Mode
Select Enable to set all 1LM/2LM memory installed in the system on the mirror mode, which
will create a duplicate copy of data stored in the memory to increase memory security, but
it will reduce the memory capacity into half. The options are Disable, Mirror Mode 1LM
and Mirror Mode 2LM.
Memory Rank Sparing
Select Enable to support memory-rank sparing to optimize memory performance. The
options are Disable and Enable.
Note: This item will not be available when memory mirror mode is enabled.
Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting
is 10.
SDDC Plus One (Available when this feature is supported by the CPU & the item:
Intel Run Sure is set to Disable)
SDDC (Single Device Data Correction) checks and corrects single-bit or multiple-bit (4-bit
max.) memory faults that affect an entire single x4 DRAM device. SDDC Plus One is the
enhanced feature to SDDC. SDDC+1 will spare the faulty DRAM device out after an SDDC
event has occurred. After the event, the SDDC+1 ECC mode is activated to protect against
any additional memory failure caused by a 'single-bit' error in the same memory rank. The
options are Disable and Enable*. (The option "Enable" can be set as default when it is
supported by the motherboard.)
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