Backup And Recovery - Epson RA8804 CE Applications Manual

Real time clock module
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RA8804 CE

8.11. Backup and Recovery

This circuit is sensitive to power supply noise and supply voltage should be stabilized to avoid negative
impact on the accuracy.
tR1 is needed for a proper power-on reset. If this power-on condition cannot be kept, it is necessary to
send an initialization routine to the RTC by software.
In case of repeated ON/OFF of the power supply within short term, it is possible that the power-on reset
becomes unstable.
After power-OFF, keep VDD = GND for more than 10 seconds for a proper power-on reset.
When it is impossible, please initialize the RTC by the software.
As for the communication of I2C, completion of less than 1 second is recommended.
If such communication requires 2 seconds (Max.) or longer, the I2C bus interface is reset by the internal
bus timeout function.
When bus-time-out occur, SDA turns to Hi-Z input mode.
But readout data of a clock is stable anytime, and there isn't contradiction.
And it does not occur that data of a clock delay even if access time is prolonged.
tR1
VDET
0V
I2C-BUS Communication state
Non-Communication
Item
Power supply rise time1
Access wait time
(After initial power on)
Power supply fall time
Power supply rise time2
Setup time from
Finish of I2C.
*:tR2 is specifications for an oscillation not to stop. Some clocks are not output by an FOUT terminal.
VDD
tCL
Communication
Symbol
Condition
tR1
VDD = VSS to 5.5 V
tCL
After VDD = VDET
tF
VDD = 5.5 V to VDET
 VDD = VDET to 5.5 V
tR2
Before VDD = VDET 
tCD
tF
tCD
Back-up operation
Non-Communication
Min.
Typ.
1
30
100
15
0
Page - 35
*
tR2
Max.
Unit.
-
10
ms/V
-
-
ms
-
-
µs/V
-
-
µs/V
-
-
µs
ETM60E-02

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