Time Update Interrupt Function; Time Update Interrupt Function Diagram - Epson RA8804 CE Applications Manual

Real time clock module
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RA8804 CE

8.6. Time Update Interrupt Function

The time update interrupt function generates interrupt events at one-second or one-minute intervals, according to
the timing of the internal clock.
When an interrupt event occurs, the UF bit value becomes "1" and the /INT pin goes to low level to indicate that an
event has occurred. (However, when a fixed-cycle timer interrupt event has been generated, low-level output from
the /INTpin occurs only when the value of the control register's UIE bit is "1". This /INT status is automatically
cleared (/INT status changes from low level to Hi-Z) earliest 7.813ms (fixed value) after the interrupt occurs.
/INT operation
example
UIE ="1"

8.6.1. Time update interrupt function diagram

UIE bit
/INT output
UF bit
Events
Operation in RTC
int' operation
Write operation
(1) A time update interrupt event occurs when the internal clock's value matches either the second update time or
the minute update time. The USEL bit's specification determines whether it is the second update time or the
minute update time that must be matched.
(2) When a time update interrupt event occurs, the UF bit value becomes "1".
(3) When the UF bit value is "1" its value is retained until it is cleared to zero.
(4) When a time update interrupt occurs, /INT pin output is low if UIE ="1".
 If UIE ="0" when a timer update interrupt occurs, the /INT pin status remains Hi-Z.
(5) Each time an event occurs, /INT pin output is low only up to the tRTN time (which is fixed as 7.813 ms for time
update interrupts) after which it is automatically cleared to Hi-Z.
 /INT pin output goes low again when the next interrupt event occurs.
(6) As long as /INT=low, the /INT pin status does not change, even if the UF bit value changes from "1"to "0".
(7) When /INT=low, the /INT pin status changes from low to Hi-Z as soon as the UIE bit value changes from "1" to
"0".
7.813ms
Min.
period
"1"
(4)
(5)
tRTN
(3)
(2)
period
period
(1)
Page - 25
UIE="1""0"
(7)
tRTN
tRTN
(6)
/INT status does not
change when UF bit is
cleared to zero.
period
period
"1"
"0"
Hi-z
"L"
tRTN
"1"
"0"
ETM60E-02

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