Operation Example Of Time-Stamp Function; Related Registers For Evin Interrupt And Time Stamp Function - Epson RA8804 CE Applications Manual

Real time clock module
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RA8804 CE

8.4.2. Operation example of Time-Stamp function.

EVIN
EF
INT
EIE
1
Command example
STEP
Write (Address, Data)
1
WriteRA8804(0x17, 0x23)
2
WriteRA8804(0x0F, 0x00)
3
WriteRA8804(0x0E, 0x38)
4
WriteRA8804(0x18, 0x00)
5
WriteRA8804(0x17, 0xA8)

8.4.3. Related registers for EVIN Interrupt and Time stamp Function

Address
Function
10
Time stamp Seconds
11
Time stamp Minutes
12
Time stamp Hours
13
Time stamp Weekday
14
Time stamp Days
15
Time stamp Months
16
Time stamp Years
17
EVIN control
18
EVIN monitor
 is available.
 is not available.
When time stamp trigger was input into an EVIN terminal, time and calendar data copies to address16h from address
10h.
These resisters are read only.
125 ms
2 3 4
contents
Disabled Time-stamp function.
Low-active is specified.
Enables Pull-Up resistor.
Disabled repeat detection.
Disable interruption of EVIN detection.
Debounce period is 125ms
Disable interruption of Time update, Timer and
Alarm.
Held UF, TF and AF, and clears VLF and VDET
Clears EVIN input detection Flag.
Enables Time-stamp function
Low-active is specified
Disabled repeat detection
Enables Pull-Up resistor
Disabled repeat detection
Disable interruption of EVIN detection
Debounce is disabled
bit 7
bit 6
bit 5
40
20
40
20
20
6
5
20
TSVLF
TSVDET
80
40
20
ECP
EHL
EPU
EF
Page - 20
μsec
Over 1
When EIE or EF is cleared to 0,
INT is released to Hi-Z
5
In first, disabled interruption of Event trigger
input.
Disabled detection of EVIN
EVIN level is equal to VDD by EPU
EVIN isn't detect.
Less than 125ms are ignored.
Enabled only EVIN interruption.
A value of update is stored at alarm, a timer,
the time, and VLF/VDET is initialized.
Clear EF
When LOW more than about 1 μ seconds
is input into an EVIN terminal after this, date
at that time is recorded.
EVIN detection interruption signal is output
by an INT terminal.
bit 4
bit 3
bit 2
bit 1
10
8
4
10
8
4
10
8
4
4
3
2
10
8
4
10
8
4
10
8
4
RCE
EIE
ET1
EVMON
immediately.
Supplement
bit 0
Read Write
2
1
2
1
2
1
1
0
2
1
2
1
2
1
ET0
ETM60E-02

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