ETM60E-02 Application Manua Real Time Clock Module RA8804 CE Preliminary...
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ETM60E Revision History Rev No. Date Page Description ETM60E-01 30.Apr.2018 Release ETM60E-02 27.Jun.2018 5) RESET bit it explained detailed function of RESET. 8.15. Figure of 32 kHz-TCXO was updated. SCL and SDA connects to GND.
RA8804 CE C-Bus Interface Real-time Clock Module RA8804 Features built-in 32.768 kHz DTCXO. Supports I C-Bus's high speed mode (Up to 400 kHz) Time -Stamp function with EVIN-Pin trigger. Outputs to SOUT-Pin of each of detection Flag or others.
RA8804 CE 3. Terminal description 3.1. Terminal connections RA8804CE 1. FOE 10. / INT 2. V 9. GND 3. EVIN 8. T2 4. FOUT 7. SDA 5. SCL 6. SOUT 3.2. Pin Functions Signal Function name This pin's signal is used for input and output of address, data, and ACK bits, synchronized with the serial clock used for I C communications.
RA8804 CE 4. Absolute Maximum Ratings GND=0V Item Symbol Condition Rating Unit 0.3 to +6.5 Supply voltage Between V and GND Input voltage (1) FOE, SCL, SDA, EVIN pins ND0.3 to +6.5 Input voltage (2) EVIN pin GND0.3 to V +0.3...
RA8804 CE 7. Electrical Characteristics 7.1. DC Characteristics =1.5Vto5.5V,Ta=40Cto+105C *Unless otherwise specified, GND=0V,V Item Symbol Condition Min. Typ. Max. Unit =5 V fSCL = 0 Hz. / INT = Hi-Z. Average Current consumption(1) 0.40 FOUT is stopped. =3 V Average Current consumption(2) 0.35...
RA8804 CE 8. Use Methods 8.1. Description of Registers 8.1.1. Write/Read and Bank Select Address 00h to 0Fh: Basic time and calendar register. It compatible with RX-8803 and RX/RA8900 Address 10h to 1Fh: Extension register Access to more than address 20h is possible, but there is some control register for quality inspection. When more than Address auto increment is looping in lower 4 bits address.
RA8804 CE 8.1.3. Register table (Time stamp, EVIN, SOUT, Timer) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Init Write Time stamp Seconds [0:0] Time stamp Minutes [0:0] ...
RA8804 CE 8.2. Details of Registers 8.2.1. Clock counter (SEC - HOUR) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 HOUR “o” indicates write-protected bits. A zero is always read from these bits.
RA8804 CE 8.2.2. Calendar counter (WEEK - YEAR) Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 WEEK “o” indicates write-protected bits. A zero is always read from these bits.
RA8804 CE 8.2.3. Alarm registers Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 MIN Alarm HOUR Alarm WEEK Alarm DAY Alarm The alarm interrupt function is used, along with the AEI, AF, and WADA bits, to set alarms for specified date, day, hour, and minute values.
RA8804 CE 3) USEL (Update Interrupt Select) bit This bit is used to define if the RTC should output a “second update” or “minute update” interrupt, allowing to synchronize external clocks with the time registers of the RTC. Auto reset time...
RA8804 CE 4) VLF (Voltage Low Flag) bit This flag bit indicates the retained status of clock operations or internal data. Its value change from “0” to “1” indicates a possible data loss or time data error due to a supply voltage drop. Once this flag bit's value is “1”, its value is retained until a “0”...
RA8804 CE 8.2.7. Control register Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Control Register CSEL1 CSEL0 RESET (Default) The default value is the value that is read (or is set internally) after powering up from 0 V.
RA8804 CE 4) AIE (Alarm Interrupt Enable) bit When an alarm timer interrupt event occurs (when the AF bit value changes from “0” to “1”), this bit's value specifies if an interrupt signal is generated (/INT status changes from Hi-Z to low) or is not generated (/INT status remains Hi-Z).
RA8804 CE 8.3. Fixed-cycle Timer Interrupt Function The fixed-cycle timer interrupt generation function generates an interrupt event periodically at any fixed cycle set between 244.14µs and 32 years. When an interrupt event is generated, the /INT pin goes to low level and “1” is set to the TF bit to report that an event has occurred.
RA8804 CE 8.3.2. Related registers for function of fixed-cycle timer interruption The fixed-cycle timer interrupt generation function generates an interrupt event periodically at any fixed cycle set between 244.14 s and 16777215 minutes. Address Function bit 7 bit 6 bit 5...
RA8804 CE 2) TSTP (Timer STOP) bit This bit controls the temporarily stopped of Timer Counter. TSTP Data Description Timer Counter are stopped. (don’t reset.) Write/Read Count down of the Timer Counter are continued. TRES (Timer Reset) bit This bit can be employed like Watch Dog Timer function.
RA8804 CE 8.4. EVIN Interrupt and Time stamp Function 8.4.1. Diagram of EVIN interrupt function "1" "1" EIE bit "0" Hi-z /INT output "L" "1" EF bit "0" Event occurs RTC internal operation Write operation (1) The EVIN interrupt event occurred.
RA8804 CE 8.4.2. Operation example of Time-Stamp function. 125 ms μsec Over 1 EVIN When EIE or EF is cleared to 0, immediately. INT is released to Hi-Z 2 3 4 Command example STEP contents Supplement Write (Address, Data) In first, disabled interruption of Event trigger Disabled Time-stamp function.
RA8804 CE 1) Time stamp Seconds data from Year data. When detect trigger input from EVIN terminal, Clock and calendar data are recorded. 2) TSVLF, TSVDET bit TSVLF bit copies from VLF bit. TSVDET bit copies from VDET bit. 3) ECP (Event capture Enable) bit ECP enables Time Stamp function.
RA8804 CE 7) EIE (EVIN Interrupt Enable) bit When valid event input occurs (when the EIF bit value changes from “0” to “1”), this bit's value specifies whether an interrupt signal is generated (/INT status changes from Hi-Z to low) or is not generated. (/INT status remains Hi-Z).
RA8804 CE 8.5. SOUT Interrupt Function Controller can select and use interrupt of a voltage drop or other detection of RTC, as a hardware interruption, and controller can use SOUT like as GPO port. 8.5.1. Operation example of SOUT function.
RA8804 CE 8.5.2. Related registers for SOUT interrupt functions. Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 SOUT Enable SOE7 SOE6 SOE5 SOE4 SOE3 SOE2 SOE1 SOE0 SOUT Select 1) SOE0 to SOE7 (SOUT Enable) bits When value of address 0x19 is 0x69, SOUT pin output function is enabled.
RA8804 CE 8.6. Time Update Interrupt Function The time update interrupt function generates interrupt events at one-second or one-minute intervals, according to the timing of the internal clock. When an interrupt event occurs, the UF bit value becomes “1” and the /INT pin goes to low level to indicate that an event has occurred.
RA8804 CE 8.6.2. Related registers for time update interrupt functions. Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Extension Register USEL TEST WADA FSEL1 FSEL0 TSEL1 TSEL0 Flag Register ...
RA8804 CE 8.7. Alarm Interrupt Function The alarm interrupt generation function generates interrupt events for alarm settings such as date, day, hour, and minute settings. When an interrupt event occurs, the AF bit value is set to “1” and the /INT pin goes to low level to indicate that an event has occurred.
RA8804 CE 3) AF (Alarm Flag) bit When this flag bit value is already set to “0”, occurrence of an alarm interrupt event changes it to “1”. When this flag bit value is “1”, its value is retained until a “0” is written to it.
RA8804 CE 8.8. About the interrupt function for operation /INT = “L” interrupt output. 1) How to identify events when the interrupt output occurred? /INT output pin is common output terminal of interrupt events of three types (Fixed-cycle timer Time interrupt, alarm interrupt, time update interrupt).
RA8804 CE 8.10. Reading/Writing Data via the I C Bus Interface 8.10.1. Overview of I2C-BUS The I C bus supports bi-directional communications via two signal lines: the SDA (data) line and SCL (clock) line. A combination of these two signals is used to transmit and receive communication start/stop signals, data transfer signals, acknowledge signals, and so on.
RA8804 CE 8.10.3. Starting and stopping I C bus communications START Repeated START(RESTART) STOP condition condition condition [ S ] [ Sr ] [ P ] 1s ( Max. ) 1) START condition, repeated START condition, and STOP condition (1) START condition ...
RA8804 CE 8.10.4. Data transfers and acknowledge responses during I C-BUS communications 1) Data transfers Data transfers are performed in 8-bit (1 byte) units once the START condition has occurred. There is no limit on the amount (bytes) of data that are transferred between the START condition and STOP condition.
RA8804 CE 8.10.6. I C bus protocol In the following sequence descriptions, it is assumed that the CPU is the master and the RA8804 is the slave. a. Address specification write sequence Since the RA8804 includes an address auto increment function, once the initial address has been specified, the RA8804 increments (by one byte) the receive address each time data is transferred.
RA8804 CE 8.11. Backup and Recovery This circuit is sensitive to power supply noise and supply voltage should be stabilized to avoid negative impact on the accuracy. tR1 is needed for a proper power-on reset. If this power-on condition cannot be kept, it is necessary to send an initialization routine to the RTC by software.
RA8804 CE 8.12. About access at the time of backup return and initial power supply Because most of RTC registers are synchronized with the oscillation clock of the built-in crystal oscillator, the RTC does not work normally without the integrated oscillator having stabilized. Please initialize the RTC at the time the power supply voltage returns (VLF = 1) after the oscillation has stabilized (after oscillation start time tSTA).
RA8804 CE 8.13. Flow chart The following flow-chart is one example, but it is not necessarily applicable for every use-case and not necessarily the most effective process for individual applications. 1) An example of the initialization Ex.1 Initialize Initialization Set TE bit to “0”.
RA8804 CE 2) Method of initialization after starting of internal oscillation (VLF stays “0”) power on Wait time of 30 ms is necessary at least Wait VLF=1 ? Whether it is a return from the state of the backup is confirmed.
RA8804 CE 3) The setting of the clock and calendar Set time Set RESET bit to “1” to prevent timer update in time setting. RESET"1" Write information of[year/month/date[day of the week]hour: minute: second] which is necessary to set (or reset).
RA8804 CE 8.14. Connection with Typical Microcontroller I C-BUS Master EVIN FOUT RA8804 SLAVE ADRS = 0110 010 R/W SOUT Pull up Registor C Bus ) 8.15. When used as a clock source (32 kHz-TCXO) RA8804 0.1 F FOUT 32.768kHz...
RA8804 CE 9. External Dimensions/Marking Layout 9.1. RA8804CE 9.1.1. External dimensions External dimensions Recommended soldering pattern 3.2 ± 0.2 0. 7 0. 4 0.42 0.35 The small metal pads on the short side of the ceramic package are used to test the crystal.
RA8804 CE 10. Application notes 1) Notes on handling This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when handling. (1) Static electricity While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by a large discharge of static electricity.
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