Nvidia Power Sequence - Clevo NP70HH Service Manual

NVIDIA Power Sequence

5
3.3VS
R635
100K_04 D23
BAT54AS3
3
D 10,20 DGPU_PWRGD
C746 *0.1u_10V_X7R_04
R693 *200K_04
40,48,53,56 EC_GPIO
Q51A Q51B
*MTDK3S6R *MTDK3S6R
6 1 4
19,40,48 SMC_VGA_THERM
R686 0_04
R685 0_04
6 1 4
19,40,48 SMD_VGA_THERM
Q52A
*MTDK3S6R
C
NVIDIA GPIO LEVEL SHIFT
1.8VS 3.3VS
3.3VS
R706 R696
100K_04 *100K_04
28 GPIO4_GC6_NVVDD_EN_R Q47A
*MTDK3S6R
D
B
G 2
S
D
S
R682 0_04
1.8VS 3.3VS
3.3VS
R751 R755
*100K_04
100K_04
28 DGPU_PWRGD_R Q59A
MTDK3S6R
D
G 2
S
D
S
A
R646 *0_04
5
4 3
DEFAULT HW POWER SEQUENCE
2
FBVDDQ_PWRGD 56
1
PEX_VDD_PWRGD 55 27 NV_EN_DOWN
19 OVERT#
43 1V8_AON_PWRGD
10,53 NVVDD_PWRGD
19,43,57 GPIO1_GC6_FB_EN
GC6_FB_EN_PCH
28,40 GC6_FB_EN_PCH
29,34,36,37,39,40 BUF_PLT_RST#
DGPU_RST#_PCH
28 DGPU_RST#_PCH
DGPU_PEX_RST#
10,19 DGPU_PEX_RST#
3
I2CC_SCL_PP 53,56
3 R672
I2CC_SDA_PP 53,56
Q52B
DGPU_PWR_EN
*MTDK3S6R R673
GC6_FB_EN_PCH
R671
DGPU_RST#_PCH
R670
R684
*100K_04
Q47B
*MTDK3S6R
G 5
GPIO4_GC6_NVVDD_EN 19,20
R752
100K_04
Q59B
MTDK3S6R
G 5
DGPU_PWRGD 10,20
4 3
2
U35
3.3VA
1 20
VDD FBVDDQ_EN NV_FBVDDQ_EN 56
2 19
VIN_DOW N PEX_VDD_EN NV_PEXVDD_EN 55
3 18 NV_NVVDDS_EN
R707 0_04
OVERT# NVVDDS_EN
4 17
SUSB# NVVDD_EN NV_NVVDD_EN 53,54
5 16 R702 0_04
NVVDDS_PW RGD 3V3_SYS_EN
R697 0_04
6 15 R690 0_04
GC6_FB_EN 1V8_MAIN_EN
7 14
NV_1V8AON_EN 43
GC6_FB_EN_PCH 1V8_AON_EN
GPIO4_GC6_NVVDD_EN
8 13 R680 0_04
PLT_RST# GPIO4_1V8_MAIN_EN
DGPU_PWR_EN
9 12
dGPU_RST#_PCH dGPU_PW R_EN DGPU_PWR_EN 28,40
10 11
GPU_PEX_RST# GND
SLG4U41681
3.3VS
1V8_AON
*100K_04 N18P
DGPU_PEX_RST#
R663 10K_04
SLG4U41681
100K_04 U35
DGPU_PEX_RST#
R675 *100K_04
*100K_04 R702 0_04
100K_04 R697
R690 0_04
R707
HW POWER DOWN SEQUENCE
NV_NVVDD_EN
Q49
NV_EN_DOWN
G
2SK3018S3
C744
*0.1u_10V_X7R_04
NV_FBVDDQ_EN
Q46
NV_EN_DOWN
G
2SK3018S3
C743
*0.1u_10V_X7R_04
Title Title Title
[20] NVIDIA POWER SEQUENCE [20] NVIDIA POWER SEQUENCE [20] NVIDIA POWER SEQUENCE
Size Size Size Document Number Document Number Document Number
6-71-NP700-D02 6-71-NP700-D02 6-71-NP700-D02
Custom Custom Custom TGL-H+GN20-P TGL-H+GN20-P TGL-H+GN20-P
Date: Date: Date: Monday, May 31, 2021 Monday, May 31, 2021 Monday, May 31, 2021
2
Schematic Diagrams
1
D
OVERT#_EC 40
NV_3V3_EN 43
NV_1V8RUN_EN 43,54
GPIO4_GC6_NVVDD_EN 19,20
Sheet 20 of 62
NVIDIA Power
GN20P
SLG4U44644VTR
Sequence
C
0_04
0_04
B
A
R e v R e v R e v
D02 D02 D02
Sheet Sheet Sheet 20 20 20 o f o f o f 62 62 62
1
NVIDIA Power Sequence B - 21