ABB Relion 670 Series Commissioning Manual page 152

Section 11
Testing functionality by secondary injection
Step no.
4-f * *
4-g
4-h
4-i
- Steps 4–g, 4–h and 4–I can also be done phase wise.
* - UBase considered as 400 kV and VT ratio as 400kV/110V
The voltage inputs U
phase L1.
* * - This step should be done only during Factory Acceptance Test (FAT). At field, the testing should be
done with the stored field values.
To calculate PUDIFL1 in steps 4-g, 4-h and 4-i, use the following equations:
IECEQUATION19128 V1 EN-US
IECEQUATION19129 V1 EN-US
Verifying the function when neutral VT is unavailable
146
Changes after step 2
Activate binary input TRIGCOMP for 1 s
Inject U
TapL1
rated frequency
Repeat step
Inject U
Tap1
rated frequency
Inject U
TapL1
frequency
, U , and U
L1 L2
1
 
  
UDIFL 1 U U
L 1 N
USEDURATL
UDIFL 1
= ´
PUDIFL 1 100
UBase 3
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WARNING Signal Test
= 30.00 V in secondary at
ALARM Signal Test
Sub-step 4–a and Sub-step 4–b
= 29.00 V in secondary at
TRIP Signal Test
Repeat Sub-step 4–a and Sub-step 4–b
= 28 V in secondary at rated
refer to the bus voltages and U
L3
 
 
U U
TapL 1 N
1
1MRK 511 403-UUS Rev. K
Expected output
• The output COMPEXED
should become HIGH for 100
ms and LASTCOMP output
should display the date and
time of compensation
• URATIOL1 and USEDURATL1
should show 0.406
• DIFURATL1 should become
LOW
• WARNING and WRNL1
signals should become HIGH
after a time delay given by the
setting tDefWrn
• PUDIFL1 should show 5.61 %
• ALARM and ALML1 signals
should become HIGH after a
time delay given by the setting
tDefAlm
• PUDIFL1 should show 8.81%
• BFI_3P and PU_Asignals
should become HIGH after a
time delay given by the setting
tDefTrip
• TRIP and TR_A signals should
become HIGH, if BlockTrip is
set to Trip enabled
• PUDIFL1 should show 12.01%
refers to the tap voltage of
TapL1
GUID-56FBF2D2-74FF-4091-9B2B-14299F50670D v1
Bay control REC670
Commissioning manual
(Equation 33)
(Equation 34)