Telit Wireless Solutions LE910C Series Hw Design Manual
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Telit Wireless Solutions LE910C Series Hw Design Manual

Telit Wireless Solutions LE910C Series Hw Design Manual

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LE910Cx - mPCIe
HW Design Guide
1VV0301510 Rev. 13 – 2021-07-07
Telit Technical Documentation

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Questions and answers

Vishali V
March 24, 2025

By referring PCI Express® Mini Card Electromechanical Specification Revision 1.2 October 26, 2007 The standard pinout module has the pins peRPo peRno CLKRST+ CLKRST- why the telit LE910C series not following pci express standard module need reason

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1 comments:
Mr. Anderson
March 24, 2025

Some pins of the LE910Cx mPCIe module differ from the PCI Express Mini Card specification and have been changed to reserved. This deviation was necessary to accommodate the module's design requirements while maintaining compatibility with Telit's older xE910 mPCIe models.

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Summary of Contents for Telit Wireless Solutions LE910C Series

  • Page 1 LE910Cx - mPCIe HW Design Guide 1VV0301510 Rev. 13 – 2021-07-07 Telit Technical Documentation...

  • Page 2: Applicability Table

    LE910Cx mPCIe Hardware Design Guide APPLICABILITY TABLE PRODUCTS LE910C1-NS LE910C1-NA LE910C1-NF LE910C4-NF LE910C1-AP LE910C4-AP LE910C1-EU LE910C4-EU LE910C1-EUX LE910C1-SVX LE910C1-SAX LE910C1-SA LE910C1-ST LE910C1-SV LE910C1-LA LE910C4-LA LE910C4-CN 1VV0301510 Rev. 13 Page 2 of 73 2021-07-07 Not Subject to NDA...

  • Page 3: Table Of Contents

    LE910Cx mPCIe Hardware Design Guide CONTENTS APPLICABILITY TABLE CONTENTS INTRODUCTION Scope Audience Contact Information, Support Symbol Conventions Related Documents GENERAL PRODUCT DESCRIPTION Overview Product Variants and Frequency Bands Target Market Main Features TX Output Power RX Sensitivity Mechanical Specifications 2.7.1. Dimensions 2.7.2.
  • Page 4 LE910Cx mPCIe Hardware Design Guide 4.3.1.1. +5V Source Power Supply Design Guidelines 4.3.1.2. +12V Source Power Supply Design Guidelines 4.3.2. Thermal Design Guidelines 4.3.3. Power Supply PCB Layout Guidelines VAUX Power Output GNSS LNA BIAS ELECTRICAL SPECIFICATION Absolute Maximum Ratings – Not Operational Recommended Operating Conditions DIGITAL SECTION Logic Levels...
  • Page 5 LE910Cx mPCIe Hardware Design Guide TX and RX Characteristics Antenna Requirements 7.3.1. Antenna Connectors 7.3.2. Main GSM/WCDMA/LTE Antenna Requirements 7.3.3. Antenna Diversity Requirements 7.3.4. GNSS Antenna Requirements 7.3.4.1. Combined GNSS Antenna 7.3.4.2. Linear and Patch GNSS Antenna MECHANICAL DESIGN Mechanical Dimensions 8.1.1.
  • Page 6 LE910Cx mPCIe Hardware Design Guide Declaration of Conformity REFERENCE TABLE OF RF BANDS CHARACTERISTICS PRODUCT AND SAFETY INFORMATION Copyrights and Other Notices 14.1.1. Copyrights 14.1.2. Computer Software Copyrights Usage and Disclosure Restrictions 14.2.1. License Agreements 14.2.2. Copyrighted Materials 14.2.3. High Risk Materials 14.2.4.

  • Page 7: Introduction

    LE910Cx mPCIe Hardware Design Guide 1. INTRODUCTION Scope This document describes some hardware solutions useful for developing a product with the Telit xE910Cx Mini PCIe Adapter. Audience This document is intended for Telit customers, especially system integrators, about to implement their applications using the Telit xE910Cx Mini PCIe Adapter. Contact Information, Support For general contact, technical support services, technical questions and report documentation errors contact Telit Technical Support at:...

  • Page 8: Symbol Conventions

    LE910Cx mPCIe Hardware Design Guide Symbol Conventions Danger: This information MUST be followed or catastrophic equipment failure or personal injury may occur. Warning: Alerts the user on important steps about the module integration. Note/Tip: Provides advice and suggestions that may be useful when integrating the module.

  • Page 9: General Product Description

    LE910Cx mPCIe Hardware Design Guide 2. GENERAL PRODUCT DESCRIPTION Overview The aim of this document is to present the possible and recommended hardware solutions useful for developing a product with the Telit LE910Cx-mPCIe module. LE910Cx-mPCIe is the Telit platform for Mini PCIe applications, such as M2M applications, table PC, based on the following technologies: •...

  • Page 10: Target Market

    LE910Cx mPCIe Hardware Design Guide Product 2G Band 3G Band 4G Band Region LE910C1-ST 2, 4, 12, 66, 71 North America – T-Mobile LE910C1-SV 4, 13 North America - Verizon LE910C1-LA 2, 3, 5, 8 1, 2, 4, 5 1, 2, 3, 4, 5, 7, 28 Latin America LE910C4-LA 2, 3, 5, 8...

  • Page 11: Tx Output Power

    LE910Cx mPCIe Hardware Design Guide Function Features USB2.0 – USB port is typically used for: Flashing of firmware and module configuration Production testing Accessing the Application Processor’s file system AT command access High-speed WWAN access to external host Interfaces Diagnostic monitoring and debugging Communication between Java application environment and an external host CPU NMEA data to an external host CPU Peripheral Ports –...
  • Page 12 LE910Cx mPCIe Hardware Design Guide Mode Primary Diversity SIMO 3GPP WCDMA 1800 – B3 -107.0 -109.0 -109.0 -103.7 WCDMA AWS – B4 -109.0 -109.5 -111.5 -106.7 WCDMA 850 – B5 -109.5 -110.5 -112.0 -104.7 WCDMA 850 – B6 -109.5 -110.5 -112.0 -106.7 WCDMA 850 –...

  • Page 13: Mechanical Specifications

    LE910Cx mPCIe Hardware Design Guide Note: The sensitivity level has a deviation of approximately +/- <2dB per model, device and channel because the level shows typical value. LTE level is measured at BW 10M. Mechanical Specifications 2.7.1. Dimensions The overall dimensions of LE910Cx-mPCIe family are: •...

  • Page 14: Pins Allocation

    LE910Cx mPCIe Hardware Design Guide 3. PINS ALLOCATION Pin-out Signal Function Type Comment Power Supply 3V3_AUX 3.3V Main Power Supply Power 3V3_AUX 3.3V Main Power Supply Power 3V3_AUX 3.3V Main Power Supply Power 3V3_AUX 3.3V Main Power Supply Power Ground Ground Ground Ground...
  • Page 15 LE910Cx mPCIe Hardware Design Guide Signal Function Type Comment SIM Card Interface External SIM signal – Power supply for 1.8 / 3V SIMVCC the SIM SIMIO External SIM signal - Data I/O 1.8 / 3V SIMCLK External SIM signal – Clock 1.8 / 3V SIMRST External SIM signal –...

  • Page 16: Pin-Out For The Full Compatibility With Pci Express Minicard Specification

    LE910Cx mPCIe Hardware Design Guide Signal Function Type Comment Reserved Reserved Reserved Reserved Reserved Reserved Table 7: Pin-out Information Warning: There are two different types of mPCIe modules; LE910Cx mPCIe V1 and LE910Cx mPCIe V2. Two types of mPCIe modules have different pinout on PCM signals but the rest of the pins are exactly the same.
  • Page 17 LE910Cx mPCIe Hardware Design Guide Some pins of LE910Cx mPCIe which are different from the PCI Express miniCard specification have been changed to reserved. For more details, refer to the following Pin- out. Signal Function Type Comment Power Supply 3V3_AUX 3.3V Main Power Supply Power 3V3_AUX...
  • Page 18 LE910Cx mPCIe Hardware Design Guide Signal Function Type Comment Active low output signal used to wake up the WAKE_N 3.3V system from stand-by Active low signal for wireless disabling W_DISABLE_N 3.3V (Flight mode) PERST_N Active low functional reset input to the card 3.3V Active low, open drain signal for WWAN LED LED_WWAN_N...
  • Page 19 LE910Cx mPCIe Hardware Design Guide Note: For more details about the new models, please contact to Telit Technical Support: • TS-EMEA@telit.com TS-AMERICAS@telit.com • • TS-APAC@telit.com TS-SRD@telit.com • 1VV0301510 Rev. 13 Page 19 of 73 2021-07-07 Not Subject to NDA...

  • Page 20: Power Supply

    LE910Cx mPCIe Hardware Design Guide 4. POWER SUPPLY The power supply circuitry and board layout are a very important part in the complete product design and they strongly reflect on the overall performance of the product, so please read carefully the requirements and the guidelines that will follow for a proper design.

  • Page 21: Electrical Design Guidelines

    LE910Cx mPCIe Hardware Design Guide • The electrical design • The thermal design • The PCB layout. 4.3.1. Electrical Design Guidelines The electrical design of the power supply strongly depends on the power source where this power is drained. • +5V input (typically PC internal regulator output) •...

  • Page 22: Source Power Supply Design Guidelines

    LE910Cx mPCIe Hardware Design Guide An example of linear regulator with 5V input is: Figure 1: An Example of Linear Regulator with 5V Input 4.3.1.2. +12V Source Power Supply Design Guidelines • The desired output for the power supply is 3.3V, so due to the big difference between the input source and the desired output, a linear regulator is not suitable and shall not be used.

  • Page 23: Thermal Design Guidelines

    LE910Cx mPCIe Hardware Design Guide An example of switching regulator with 12V input is in the below schematic: Figure 2: An Example of Switching Regulator with 12V Input 4.3.2. Thermal Design Guidelines The thermal design of the application board and the power supply heat sink should be done with the following specifications: •...

  • Page 24: Power Supply Pcb Layout Guidelines

    LE910Cx mPCIe Hardware Design Guide The area to which the thermal pad is attached to on the application board must be designed as a large ground pad (with solder mask exposed). Note: The average consumption during transmissions depends on the power level at which the device is requested to transmit by the network.
  • Page 25 LE910Cx mPCIe Hardware Design Guide • The PCB traces to the LE910Cx-mPCIE and the Bypass capacitor must be wide enough to ensure that no significant voltage drops occur. This is for the same reason as previous point. Try to keep this trace as short as possible. •...

  • Page 26: Vaux Power Output

    LE910Cx mPCIe Hardware Design Guide VAUX Power Output A regulated power supply output is provided to supply small devices from the module. This output is active when the module is ON and goes OFF when the module is shut down. The operating range characteristics of the supply are as follows: Item Typical...
  • Page 27 LE910Cx mPCIe Hardware Design Guide Note: In case internal bias is not sufficient, the user can add an external bias which can be controlled by pin 48 GPS_LNA_EN, using AT command. In this case, a DC block should be used to avoid conflicts with miniPCIe adapter internal LDO.

  • Page 28: Electrical Specification

    LE910Cx mPCIe Hardware Design Guide 5. ELECTRICAL SPECIFICATION Absolute Maximum Ratings – Not Operational Warning: A deviation from the value ranges listed below may harm the LE910Cx module. Symbol Parameter Unit VBATT Battery supply voltage on pin VBATT - 0.5 [ V] Table 12: Absolute Maximum Ratings –...

  • Page 29: Digital Section

    LE910Cx mPCIe Hardware Design Guide 6. DIGITAL SECTION Logic Levels Parameter ABSOLUTE MAXIMUM RATINGS Input level on any digital pin (CMOS 1.8) with -0.3V 2.16V respect to ground Input level on any digital pin (CMOS 1.8) with -0.3V 0.3V respect to ground when VBATT is not supplied Input level on any digital pin (CMOS 3.3) with -0.3V 3.6V...

  • Page 30: Power On

    LE910Cx mPCIe Hardware Design Guide Parameter Low-level input leakage current, no pull-up - 10uA High-level input leakage current, no pull-down 10uA Pull-up resistance 10kΩ 100kΩ Pull-down resistance 10kΩ 100kΩ Input capacitance Table 14: Logic Levels Minimum and Maximum Power On The LE910Cx-mPCIe will automatically power on as soon as VBATT is applied to the module.
  • Page 31 LE910Cx mPCIe Hardware Design Guide The following flow chart shows the proper turn on procedure: “Modem ON Proc” START PWR Supply Delay = 8 s PWRMON=ON Enter AT<CR> AT Answer in AT Init Sequence 1sec? Delay 1s – 5s PWRMON=ON Modem Reset Proc Delay = 8 sec Start AT CMD...

  • Page 32: Unconditional Restart

    LE910Cx mPCIe Hardware Design Guide A flow chart showing the AT commands managing procedure is displayed below: “Start AT CMD” START Delay = 300 msec Enter AT <CR> AT answer in Disconnect PWR Supply 1 sec ? GO TO “Start AT CMD” “Modem ON Proc.”...
  • Page 33 LE910Cx mPCIe Hardware Design Guide PIN DESCRIPTION Signal Function PERST_N Active low functional reset to the card Table 15: PERST_N Signal’ OPERATING LEVELS The PERST_N line is 3.3V tolerant as specified by PCI Express Mini Card Electromechanical Specification Revision 2.1 standard. Warning: The hardware unconditional Reset must not be used during normal operation of the device since it does not detach the device from the network.
  • Page 34 LE910Cx mPCIe Hardware Design Guide In the following flow chart is detailed the proper restart procedure: Modem Reset Proc. PERST_N = LOW Delay 200ms PERST_N = OPEN Delay 1s Apply Power On Procedure Figure 7: Restart Procedure Note: In order to prevent a back powering effect it is recommended to prevent any HIGH logic level signal from being applied to the digital pins of the LE910Cx-mPCIe when the module is powered OFF or during an ON/OFF transition.

  • Page 35: Power Off Procedure

    LE910Cx mPCIe Hardware Design Guide Power OFF Procedure To turn OFF the LE910Cx-mPCIe module, the W_DISABLE_N pin must be asserted low, otherwise the module will be power up immediately. For a proper shutdown operation, use the AT#SHDN command. When a shutdown command is sent, the LE910Cx enters the finalization state and at the end of the finalization process shuts down PWRMON.

  • Page 36: Control Signals

    LE910Cx mPCIe Hardware Design Guide The below flow chart is detailed the proper power OFF procedure: Modem Power Proc. W_DISABLE_N = LOW Delay 200ms AT#SHDN Delay 15s PWRMON is Delay 5s OFF? Done Figure 9: Power OFF Procedure Note: Software shutdown feature is not supported on early engeeniring samples.

  • Page 37: Wake_N

    LE910Cx mPCIe Hardware Design Guide Signals Function Type GPS_LNA_EN Enables the external regulator for GPS LNA 1.8V Table 16: Control Signals 6.5.1. WAKE_N WAKE_N is driven, by default, by the module according the PCI Express Mini Card Electromechanical Specification Revision 2.1. Note: WAKE_N is not supported in host using PCI Express Mini Card Electromechanical Specification Revision 1.1 and below.

  • Page 38: W_Disable_N

    LE910Cx mPCIe Hardware Design Guide EXAMPLE: In the following example, a RING monitor activates the WAKEUP signal. (For more information read Event Monitor Application Note 80000NT10028a). AT#ENAEVMONI=0 //disable all events AT#GPIO=3,0,1 //Set GPIO3=>’0’, “WAKE signal reset” AT#ENAEVMONICFG=3,1,2 //AT port setting AT#EVMONI="RING",0,1,3 //event 0-RING, after 3 rings AT#EVMONI="RING",0,0,"AT#GPIO=3,1,1"...

  • Page 39: Perst_N

    LE910Cx mPCIe Hardware Design Guide Figure 11: Internal LED_WWAN_N Driver and Recommended Connection to a LED Note: THIS SIGNAL IS NOT ACTIVE BY DEFAULT. REFER TO AT#SLED DESCRIPTION IN THE AT COMMAND USER GUIDE. 6.5.4. PERST_N PERST_N is used to reset the LE910Cx-mPCIe. Whenever this signal is pulled low, the LE910Cx-mPCIe is reset.

  • Page 40: Hardware Interfaces

    LE910Cx mPCIe Hardware Design Guide Parameter PERST_N Input high 2.0V 3.6V PERST_N Input low - 0.5V 0.8V Table 17: PERST_N Signal Hardware Interfaces Following table below summarize the hardware interfaces for LE910Cx-mPCIe: Interface LE910Cx-mPCIe USB2.0 For sensors, audio control UART HS-UART (up to 4 Mbps) Audio I/F I2S/PCM...

  • Page 41: Serial Port

    LE910Cx mPCIe Hardware Design Guide Signal Usage Plus (+) line of the differential, bi-directional USB signal to/from the USB_D+ peripheral device Table 19: USB Interface Signals Note: USB_VBUS controlled internally TGPIO_10. disabling/enabling use at commands via UART port. For example: at#gpio=10,0,1 will disable USB_VBUS at#gpio=10,1,1 will ebable USB_VBUS For more information follow 80407ST10116A, LE9x0 AT Command...

  • Page 42: Modem Serial Port 1 Signals

    LE910Cx mPCIe Hardware Design Guide 6.6.2.1. Modem Serial Port 1 Signals Serial Port 1 on LE910Cx-mPCIe is a +1.8V UART with 4 RS232 signals. It differs from the PC-RS232 in signal polarity (RS232 is reversed) and levels. List of the signals of LE910Cx-mPCIe serial port: RS232 Pin Signal Name...
  • Page 43 LE910Cx mPCIe Hardware Design Guide The easiest way to translate the levels and invert the signal is by using a single chip-level translator. There are a multitude of them, differing in the number of drivers and receivers and in the levels (make sure to get a true RS232 level translator, not a RS485 or other standards).

  • Page 44: I2C - Inter-Integrated Circuit

    LE910Cx mPCIe Hardware Design Guide The RS232 serial port lines are usually connected to a DB9 connector as shown in a Figure below. Signal names and directions are named and defined from the DTE point of view. RS232 Serial Port Lines Connection Layout: Figure 13: RS232 Serial Port Lines 6.6.3.

  • Page 45: Sim Interface

    LE910Cx mPCIe Hardware Design Guide Signal Function Type Comment Digital Audio Interface PCM_CLK B-PD 1.8V PCM_CLK (CLK) REF_CLK Audio Master Clock B-PD 1.8V I2S_MCLK Table 21: Digital Audio Interface (DVI) Signals LE910Cx-mPCIe DVI has the following characteristics: • PCM Master mode or Slave mode using short or long frame sync modes •...
  • Page 46 LE910Cx mPCIe Hardware Design Guide LE910Cx-mPCIe External SIM card SIMIO 12 SIMCLK SIMRST SIMVCC SIMIN 7 SIMIN 100nF 33pF 33pF 33pF Figure 14: SIM Interface Signal Function Type SIMVCC External SIM signal – Power supply for the SIM 1.8 / 3V SIMIO External SIM signal - Data I/O 1.8 / 3V...

  • Page 47: Rf Section

    LE910Cx mPCIe Hardware Design Guide 7. RF SECTION Band Variants Please refer to the table provided in Section Product Variants and Frequency Bands TX and RX Characteristics Please refer to the Module’s Hardware User guide for the details Antenna Requirements 7.3.1.

  • Page 48: Main Gsm/Wcdma/Lte Antenna Requirements

    LE910Cx mPCIe Hardware Design Guide The available connectors are: • Main RF antenna (ANT) • RX Diversity Antenna (DIV) • GNSS Antenna (GPS) Connecting cables between the module and the antenna must have an impendance of 50 Ω. If the module impedance does not match, the RF performance is reduced significantly. If the host device is not designed to use the module diversity or the GPS antenna, terminate the interface with a 50Ω...

  • Page 49: Gnss Antenna Requirements

    LE910Cx mPCIe Hardware Design Guide Item Value The bands supported by each variant of the xE910Cx module family are provided in Section Product Variants and Frequency Bands Impedance 50 ohm ≤ 2:1 (limit to fulfill all regulatory requirements) VSWR recommended Table 24: Antenna Diversity Requirements Note: If Rx Diversity is not used/connected, perfectly disable the Diversity functionality using the AT+XRXDIV command (refer to...

  • Page 50: Combined Gnss Antenna

    LE910Cx mPCIe Hardware Design Guide Note: It is recommended to add a DC block to the customer’s GPS application to prevent damage to the LE910Cx-mPCIe module due to unwanted DC voltage. Note: If GNSS is not used/connected, perfectly disable the GNSS functionality using the AT$GPSP command (refer to 80490ST10778A LE920x4/LE910Cx AT Command User Guide) and connect the GNSS ANT Connector to a 50 Ohm termination or floating.

  • Page 51: Mechanical Design

    LE910Cx mPCIe Hardware Design Guide 8. MECHANICAL DESIGN Mechanical Dimensions The LE910Cx-mPCIe overall dimensions are: • Length: 50.95 mm • Width: 30 mm • Thickness 3.2 mm (Version with SIM holder : 4.62 mm) • Weight • With SIM holder: 10.3 grams •...
  • Page 52 LE910Cx mPCIe Hardware Design Guide Figure 15: LE910Cx-mPCIe (with SIM Holder) Mechanical Top View 1VV0301510 Rev. 13 Page 52 of 73 2021-07-07 Not Subject to NDA...

  • Page 53: Bottom View

    LE910Cx mPCIe Hardware Design Guide 8.1.1.2. Bottom View The figure below shows mechanical bottom view of the LE910Cx-mPCIe as seen from the bottom side. The figure shows the SIM holder it is not mounted by default. (with SIM holder) Figure 16: LE910Cx-mPCIe (with SIM Holder) Mechanical Bottom View 1VV0301510 Rev.

  • Page 54: Side View

    LE910Cx mPCIe Hardware Design Guide 8.1.1.3. Side View The figure below shows mechanical side view of the LE910Cx-mPCIe. Figure 17: LE910Cx-mPCIe Mechanical Side View 1VV0301510 Rev. 13 Page 54 of 73 2021-07-07 Not Subject to NDA...

  • Page 55: Mechanical Drawing (Without Sim Holder)

    LE910Cx mPCIe Hardware Design Guide 8.1.2. Mechanical Drawing (without SIM Holder) 8.1.2.1. Top View The figure below shows mechanical top view of the LE910Cx-mPCIe Figure 18: LE910Cx-mPCIe Mechanical Top View 1VV0301510 Rev. 13 Page 55 of 73 2021-07-07 Not Subject to NDA...

  • Page 56: Bottom View

    LE910Cx mPCIe Hardware Design Guide 8.1.2.2. Bottom View The figure below shows mechanical bottom view of the LE910Cx-mPCIe as seen from bottom side. Figure 19: LE910Cx-mPCIe Mechanical Bottom View from Bottom Side. 1VV0301510 Rev. 13 Page 56 of 73 2021-07-07 Not Subject to NDA...

  • Page 57: Side View

    LE910Cx mPCIe Hardware Design Guide 8.1.2.3. Side View Figure 20: Side View 1VV0301510 Rev. 13 Page 57 of 73 2021-07-07 Not Subject to NDA...

  • Page 58: Application Pcb Design

    LE910Cx mPCIe Hardware Design Guide 9. APPLICATION PCB DESIGN The LE910Cx-mPCIe modules have been designed to comply with a standard lead-free SMT process. Recommended Footprint for the Application LE910Cx-mPCIe modules fits any full mPCIe 52 pin socket and latch connectors compliant with PCI Express Mini Card Electromechanical Specification Revision 2.1 Given below example of board connector (MM60-52B1-E1-R650, JAE) and latch (MM60- EZH059-B5-R650, JAE) footprint for reference only:...

  • Page 59: Emc Recommendations

    LE910Cx mPCIe Hardware Design Guide 10. EMC RECOMMENDATIONS All LE910Cx-mPCIe signals are equipped with some EMC protection. However, the accepted level differs according to the specific pin. EMC Recommendations: Signal Function Contact All pins All pins All functions ± 4 KV ±...

  • Page 60: Packaging

    LE910Cx mPCIe Hardware Design Guide 11. PACKAGING Tray The LE910Cx-mPCIe modules are packaged on trays of 20 pieces each: Modules per Trays per Modules per Envelopes per Carton Modules per Tray Envelope Envelope 5+1 empty Table 26: LE910Cx-mPCIe Modules Tray Tray Packing Oder Type Quantity...
  • Page 61 LE910Cx mPCIe Hardware Design Guide Figure 23: LE910Cx-mPCIe Tray Organization 1VV0301510 Rev. 13 Page 61 of 73 2021-07-07 Not Subject to NDA...

  • Page 62: Tray Drawing

    LE910Cx mPCIe Hardware Design Guide Tray Drawing Figure 24: LE910Cx-mPCIe Tray Drawing Warning: These trays can withstand a maximum temperature of 65℃. 1VV0301510 Rev. 13 Page 62 of 73 2021-07-07 Not Subject to NDA...

  • Page 63: Moisture Sensitivity

    LE910Cx mPCIe Hardware Design Guide Moisture Sensitivity The LE910Cx-mPCIe is a Moisture Sensitive Device level 3, in accordance with standard IPC/JEDEC J-STD-020; it takes care of all related requirements for the use of this type of components. Moreover, the customer must take care of the following conditions: a) Calculated shelf life in sealed bag: 12 months at <40°C and <90% relative humidity (RH).

  • Page 64: Conformity Assessment Issues

    LE910Cx mPCIe Hardware Design Guide 12. CONFORMITY ASSESSMENT ISSUES Declaration of Conformity Hereby, Telit Communications S.p.A declares that the LE910Cx-mPCIe is in compliance with Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet https://www.telit.com/red address: 1VV0301510 Rev.

  • Page 65: Reference Table Of Rf Bands Characteristics

    LE910Cx mPCIe Hardware Design Guide 13. REFERENCE TABLE OF RF BANDS CHARACTERISTICS Mode Freq. Tx (MHz) Freq. Rx (MHz) Channels Tx-Rx Offset PCS 1900 1850.2 ~ 1909.8 1930.2 ~ 1989.8 512 ~ 810 80 MHz DCS 1800 1710 ~ 1785 1805 ~ 1880 512 ~ 885 95 MHz...
  • Page 66 LE910Cx mPCIe Hardware Design Guide Mode Freq. Tx (MHz) Freq. Rx (MHz) Channels Tx-Rx Offset Tx: 21450 ~ 21799 LTE 900 – B8 880 ~ 915 925 ~ 960 45 MHz Rx: 3450 ~ 3799 Tx: 21800 ~ 2149 LTE 1800 – B9 1749.9 ~ 1784.9 1844.9 ~ 1879.9 95 MHz...

  • Page 67: Product And Safety Information

    LE910Cx mPCIe Hardware Design Guide 14. PRODUCT AND SAFETY INFORMATION Copyrights and Other Notices SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE Although reasonable efforts have been made to ensure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from the use of the information contained herein.

  • Page 68: Usage And Disclosure Restrictions

    LE910Cx mPCIe Hardware Design Guide countries reserve to Telit and other Third Party SW exclusive rights for copyrighted computer programs, including – but not limited to - the exclusive right to copy or reproduce in any form the copyrighted products. Accordingly, any copyrighted computer programs contained in Telit’s products described in this instruction manual shall not be copied (reverse engineered) or reproduced in any manner without the express written permission of the copyright owner, being Telit or the Third Party software supplier.

  • Page 69: Trademarks

    LE910Cx mPCIe Hardware Design Guide 14.2.4. Trademarks TELIT and the Stylized T-Logo are registered in the Trademark Office. All other product or service names are property of their respective owners. 14.2.5. 3rd Party Rights The software may include Third Party’s software Rights. In this case the user agrees to comply with all terms and conditions imposed in respect of such separate software rights.

  • Page 70: Safety Recommendations

    LE910Cx mPCIe Hardware Design Guide AND/OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR THEY ARE FORESEEABLE OR FOR CLAIMS BY ANY THIRD PARTY. Safety Recommendations Make sure the use of this product is allowed in your country and in the environment required.

  • Page 71: Glossary

    LE910Cx mPCIe Hardware Design Guide 15. GLOSSARY Analog – Digital Converter Clock CMOS Complementary Metal – Oxide Semiconductor Chip Select Digital – Analog Converter Data Terminal Equipment Equivalent Series Resistance GPIO General Purpose Input Output High Speed HSDPA High Speed Downlink Packet Access HSIC High Speed Inter Chip HSUPA...

  • Page 72: Document History

    LE910Cx mPCIe Hardware Design Guide 16. DOCUMENT HISTORY Revision Date Changes 2021-07-07 Applicability Table and Section 2.2 - Update product variants(SVX and SAX ) Minor changes on the language and layout Legal Notices updated 2021-01-27 Modified table errors and typos Section 3.2 –...

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