XVME-200/290 Manual
December, 1987
Connector
Signal
and
Mnemonic
Pin Number
1A:20
IACK*
IRQl*-
1B:24-30
IRQ7*
LWORD*
lC:13
(RESERV-
2B:3
ED)
SERCLK
lB:21
SERDAT
1B:22
1A:l0
SYSCLK
Table A-l. VMEbus Signal Identification (cont'd)
Signal Name and Description
INTERRUPT ACKNOWLEDGE: Open-collector or three-
state driven signal from any master processing an
interrupt request.
slot 1, where it is looped-back to become slot 1
IACKIN* in order to start the interrupt acknowledge
daisy-chain.
INTERRUPT REQUEST (l-7): Open-collector driven
signals,
generated by an interrupter, which carry
prioritized interrupt requests.
highest
priority.
LONGWORD: Three-state driven signal indicates that
the current transfer is a 32-bit transfer.
RESERVED: Signal line reserved for future VMEbus
enhancements. This line must not be used.
A reserved signal which will be used as the clock for a
serial communication bus protocol which is still being
finalized.
A
reserved
transmission
messages.
SYSTEM CLOCK: A constant 16-MHz
is independent of processor speed or timing. It is used
for general system timing use.
It is routed via the backplane to
signal
which
will
line
for
serial
A-4
Level seven is the
be
used
as
the
communication
bus
clock signal that
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