Acqiris SA230E User Manual page 21

1 channel, 14-bit, 4 gs/s, dc up to 2 ghz bandwidth
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max ADC code
min ADC code
Table 2.3 - Structure of the signed left-aligned 16-bit ADC code
Note that because of ADC linearity corrections, all 16 bits should be considered when using the
samples values in ADC code format.
Using basic digitizer function (without DGT option)
If the ADC module had been ordered with a specific application mode and without the digitizer mode
(.i.e. without DGT firmware option), user can perfom the basic digitizer functions described in previous
sections but with restriction for the following features:
Limitation of the maximum record size
Limitation of the maximum number of records limitation
Decimation capability
No baseline correction
No self-trigger capability
No data inversion capability.
No pre-trigger
Limitation of the post-trigger range.
Acqiris SA230E User's Manual
Signed raw (binary)
8191 (01 1111 1111 1111)
-8192 (10 0000 0000 0000)
-1 (11 1111 1111 1111)
1 (00 0000 0000 0001)
2.1   Digitizer acquisition mode
Signed left-aligned 16-bit
(binary)
32764 (0111 1111 1111 1100)
-32768 (1000 0000 0000 0000)
-4 (1111 1111 1111 1100)
4 (0000 0000 0000 0100)
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