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AR_TBT
5
XTAL
TBT_XTAL_25_OUT
X2
TBT_XTAL_25_IN
2
1
3
4
C624
C625
FSX3L 25MHZ
6p_50V_NPO_04
6p_50V_NPO_04
D
VCC3V3_FLASH
AR/PPS COMMON FLASH
C1076
R734
R733
R736
R735
0.1u_10V_X7R_04
U51
8
5
TBT_EE_DI
VDD
SI
TBT_EE_DO
2
SO
TBT_EE_W P_N
3
1
TBT_EE_CS_N
WP#
CE#
TBT_EE_CLK
6
SCK
TBT_HOLD_N
7
4
HOLD#
VSS
W 25Q80DV
C
VCC3V3_S0_SYS
TBT_HDMI_DDC_DATA
*2.2K_04
R302
TBT_HDMI_DDC_CLK
R299
*2.2K_04
TBT_SNK0_DDC_CLK
R664
*2.2K_04
TBT_SNK0_DDC_DATA
R694
*2.2K_04
RTD3_CIO_PW R_EN
R325
*10K_04
BUF_PLT_RST#_AR
VCC3V3_SX_SYS
TBT_I2C_SDA
R311
2.2K_1%_04
TBT_I2C_SCL
R312
2.2K_1%_04
TBT_PCIe_W AKE_N
R309
10K_04
TBT_CIO_PLUG_EVENT_N
R308
10K_04
TBT_SLP_S3_N
R331
10K_04
TBT_BATLOW _N
R326
10K_04
TBTA_I2C_INT
R745
10K_04
TBTB_I2C_INT
R328
10K_04
RTD3_USB_PW R_EN
R738
100K_04
RTD3_CIO_PW R_EN
R327
100K_04
TBT_TMU_CLK_OUT
R310
100K_04
TBT_FORCE_PW R
R728
100K_04
OUT2_HPD
R307
100K_04
TBTA_LSRX
R348
1M_04
TBTA_LSTX
R740
1M_04
B
TBTA_HPD
R698
100K_04
TBT_SNK1_DDC_CLK
R672
100K_04
SINK0_CFG1
R686
100K_04
TBTB_LSTX
R347
1M_04
TBTB_LSRX
R741
1M_04
TBTB_HPD
R322
100K_04
DPSNK1_HPD
R669
100K_04
VCC3V3_LC
TBT_TDI
R670
*10K_04
TBT_TMS
R684
*10K_04
TBT_TCK
D02A_0321_
R688
*10K_04
TBT_TDO
R680
*10K_04
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW:
GPIO
| TERMINATION
| Power Rail
----------------------------------------------------
GPIO_0
| 10K
PU
|
VCC3V3_LC
GPIO_1
| 10K
PU
|
VCC3V3_LC
GPIO_2
| 100K
PD
|
GPIO_3
| 100k
PD
|
GPIO_4
| 10K
PU
|
VCC3V3_LC
GPIO_5
| 10K
PU
|
VCC3V3_LC
GPIO_6
| 100K
PD
|
DEBUG PINs:
GPIO_7
| 100K
PD
|
GPIO_8
| 100K
PD
|
PIN
| TERMINATION
POC_GPIO_0
| 10K
PU
|
VCC3V3_TBT_SX
-------------------------------
A
POC_GPIO_1
| 10K
PU
|
VCC3V3_TBT_SX
MONDC_SVR
| GND
POC_GPIO_2
| 100K
PD
|
MONDC_DPSNK_0
| GND
POC_GPIO_3
| 100K
PD
|
MONDC_DPSNK_1
| GND
POC_GPIO_4
| 10K
PU
|
VCC3V3_TBT_SX
MONDC_DPSRC
| GND
POC_GPIO_5
| 10K
PU
|
VCC3V3_TBT_SX
MONDC_CIO_0
| GND
POC_GPIO_6
| 100K
PD
|
MONDC_CIO_1
| GND
TEST_EDM
| GND
FUSE_VQPS_64
| GND
FUSE_VQPS_128
| GND
ATEST_P/N
| FLOATING
USB2_ATEST
| FLOATING
PCIE_ATEST
| FLOATING
5
4
3
NOTE:
SNK0_DDC_data/clk ?connect to 2k PU only if SRC0 is connected and support HDMI (a.i HDMI or DP++ connector). Otherwise can be 100k PD.
SNK1_DDC_data ?connect to 100k PD. If SRC0 support HDMI, connect as SNK0_CFG1 to GPU and/or appropriate AUX/DDC demux control
SNK1_DDC_clk ?connect to 100k PD.
Y23
[30]
PCIE_TXP1_TBT
PCIE_RX0_P
Y22
[30]
PCIE_TXN1_TBT
PCIE_RX0_N
T23
[30]
PCIE_TXP2_TBT
PCIE_RX1_P
T22
[30]
PCIE_TXN2_TBT
PCIE_RX1_N
M23
[30]
PCIE_TXP3_TBT
PCIE_RX2_P
M22
[30]
PCIE_TXN3_TBT
PCIE_RX2_N
H23
[30]
PCIE_TXP4_TBT
PCIE_RX3_P
H22
[30]
PCIE_TXN4_TBT
PCIE_RX3_N
V19
[31]
TBT_REFCLK_100_P
PCIE_REFCLK_100_IN_P
T19
[31]
TBT_REFCLK_100_N
PCIE_REFCLK_100_IN_N
TBT_CLKREQ#_N
AC5
[31]
TBT_CLKREQ#_N
PCIE_CLKREQ_N
C589
0.1u_6.3V_X5R_02
DPSNK1_ML0_P
AB7
[46]
OUT2_D0p
DPSNK0_ML0_P
DPSNK1_ML0_N
C588
0.1u_6.3V_X5R_02
AC7
[46]
OUT2_D0n
DPSNK0_ML0_N
C587
0.1u_6.3V_X5R_02
DPSNK1_ML1_P
AB9
[46]
OUT2_D1p
DPSNK0_ML1_P
C586
0.1u_6.3V_X5R_02
DPSNK1_ML1_N
AC9
[46]
OUT2_D1n
DPSNK0_ML1_N
DPSNK1_ML2_P
C585
0.1u_6.3V_X5R_02
AB11
[46]
OUT2_D2p
DPSNK0_ML2_P
DPSNK1_ML2_N
AC11
C584
0.1u_6.3V_X5R_02
[46]
OUT2_D2n
DPSNK0_ML2_N
C583
0.1u_6.3V_X5R_02
DPSNK1_ML3_P
AB13
[46]
OUT2_D3p
DPSNK0_ML3_P
DPSNK1_ML3_N
C582
0.1u_6.3V_X5R_02
AC13
[46]
OUT2_D3n
DPSNK0_ML3_N
C978
0.1u_6.3V_X5R_02
DPSNK1_AUX_P
Y11
[46]
OUT2_AUXp_SCL
DPSNK0_AUX_P
C979
0.1u_6.3V_X5R_02
DPSNK1_AUX_N
W11
[46]
OUT2_AUXn_SDA
DPSNK0_AUX_N
AA2
[46]
OUT2_HPD
DPSNK0_HPD
R667
100K_04
TBT_SNK0_DDC_CLK
Y5
DPSNK0_DDC_CLK
TBT_SNK0_DDC_DATA
R4
DPSNK0_DDC_DATA
R692
100K_04
AB15
DPSNK1_ML0_P
AC15
DPSNK1_ML0_N
AB17
DPSNK1_ML1_P
VCC3V3_SX_SYS
AC17
DPSNK1_ML1_N
C568
*0.1u_10V_X7R_04
AB19
DPSNK1_ML2_P
AC19
DPSNK1_ML2_N
1
AB21
DPSNK1_ML3_P
4
AC21
DPSNK1_ML3_N
2
BUF_PLT_RST#
[34,35,37,38,47,48]
Y12
DPSNK1_AUX_P
W12
DPSNK1_AUX_N
U14
DPSNK1_HPD
Y6
DPSNK1_HPD
*U74AHC1G08G-AL5-R
TBT_SNK1_DDC_CLK
Y8
R294
0_04
DPSNK1_DDC_CLK
SINK0_CFG1
N4
DPSNK1_DDC_DATA
R687
14K_1%_04
DPSNK_RBIAS
Y18
DPSNK_RBIAS
TBT_TDI
Y4
TDI
TBT_TMS
V4
TMS
TBT_TCK
T4
TCK
TBT_TDO
W4
TDO
TBT_RBIAS
R721
4.75K_0.5%_04
H6
RBIAS
TBT_RSENSE
J6
+/-0.5%
RSENSE
A15
[45]
TBTA_CA2HD_1_P
PA_RX1_P
B15
[45]
TBTA_CA2HD_1_N
PA_RX1_N
C1097 0.22u_10V_X5R_02
TBTA_TX1_P
A17
[45]
TBTA_HD2CA_1_P
PA_TX1_P
C1098 0.22u_10V_X5R_02
TBTA_TX1_N
B17
PA_TX1_N
[45]
TBTA_HD2CA_1_N
TBTA_TX0_P
C629
0.22u_10V_X5R_02
A19
[45]
TBTA_HD2CA_0_P
PA_TX0_P
TBTA_TX0_N
B19
C628
0.22u_10V_X5R_02
[45]
TBTA_HD2CA_0_N
PA_TX0_N
B21
[45]
TBTA_CA2HD_0_P
PA_RX0_P
A21
[45]
TBTA_CA2HD_0_N
PA_RX0_N
TBTA_AUX_P
Y15
C1005
0.1u_10V_X7R_04
[44]
TBTA_DPSRC_AUX_P
PA_DPSRC_AUX_P
C998
0.1u_10V_X7R_04
TBTA_AUX_N
W15
[44]
TBTA_DPSRC_AUX_N
PA_DPSRC_AUX_N
E20
[44]
TBTA_USB2_D_P
PA_USB2_D_P
D20
[44]
TBTA_USB2_D_N
PA_USB2_D_N
TBTA_LSTX
A5
[44]
TBTA_LSTX
PA_LSTX
TBTA_LSRX
A4
[44]
TBTA_LSRX
PA_LSRX
TBTA_HPD
M4
[44]
TBTA_HPD
PA_DPSRC_HPD
R725
499_1%_04
PA_USB2_RBIAS
H19
PA_USB2_RBIAS
AC23
THERMDA
AB23
THERMDA
VCC3V3_SX_SYS
V18
PCIE_ATEST
C1094
*0.1u_10V_X7R_04
AC1
TEST_EDM
L15
FUSE_VQPS_64
1
N15
FUSE_VQPS_128
TBT_SLP_S3_N
4
2
C23
MONDC_CIO_0
C22
MONDC_CIO_1
U54
U74AHC1G08G-AL5-R
SUSB#
[10,32,34,35,41,42,50,56]
4
3
2
1
V23
PET0_P
C597
0.22u_10V_X5R_02
PCIE_TX0_P
PCIE_RXP1_TBT
V22
PET0_N
C594
0.22u_10V_X5R_02
PCIE_TX0_N
PCIE_RXN1_TBT
PET1_P
P23
C599
0.22u_10V_X5R_02
PCIE_TX1_P
PCIE_RXP2_TBT
PET1_N
P22
C602
0.22u_10V_X5R_02
PCIE_TX1_N
PCIE_RXN2_TBT
K23
PET2_P
C607
0.22u_10V_X5R_02
PCIE_TX2_P
PCIE_RXP3_TBT
K22
PET2_N
C610
0.22u_10V_X5R_02
PCIE_TX2_N
PCIE_RXN3_TBT
F23
PET3_P
C614
0.22u_10V_X5R_02
PCIE_TX3_P
PCIE_RXP4_TBT
F22
PET3_N
C615
0.22u_10V_X5R_02
PCIE_TX3_N
PCIE_RXN4_TBT
BUF_PLT_RST#_AR
L4
PERST_N
N16
PCIe_RBIAS
R691
3.01K_1%_04
PCIE_RBIAS
R2
DPSRC_ML0_P
VCC3V3_SX_SYS
R1
DPSRC_ML0_N
N2
DPSRC_ML1_P
N1
DPSRC_ML1_N
TBT_PCIe_W AKE_N
L2
S
D
LAN_W AKEUP#
DPSRC_ML2_P
L1
DPSRC_ML2_N
Q52
J2
DPSRC_ML3_P
*2SK3018S3
J1
DPSRC_ML3_N
W19
DPSRC_AUX_P
Y19
DPSRC_AUX_N
TBT_SRC_HPD
G1
DPSRC_HPD
N6
DPSRC_RBIAS
R717
14K_1%_04
DPSRC_RBIAS
TBT_I2C_SDA
U1
GPIO_0
TBT_I2C_SDA
[44]
TBT_I2C_SCL
U2
GPIO_1
TBT_I2C_SCL
[44]
V1
TBT_EE_W P_N
GPIO_2
V2
TBT_TMU_CLK_OUT
GPIO_3
W1
TBT_PCIe_W AKE_N
GPIO_4
TBT_CIO_PLUG_EVENT_N
W2
R303
0_04
TBCIO_PLUG_EVENT
GPIO_5
Y1
TBT_HDMI_DDC_DATA
GPIO_6
Y2
TBT_HDMI_DDC_CLK
GPIO_7
AA1
TBT_SRC_CFG1
GPIO_8
J4
TBTA_I2C_INT
POC_GPIO_0
TBTA_I2C_INT
[44]
TBTB_I2C_INT
E2
POC_GPIO_1
D4
RTD3_USB_PW R_EN
POC_GPIO_2
H4
TBT_FORCE_PW R
R720
0_04
POC_GPIO_3
TBT_FRC_PW R
F2
TBT_BATLOW _N
POC_GPIO_4
TBT_SLP_S3_N
D2
R333
*0_04
POC_GPIO_5
SUSB#
[10,32,34,35,41,42,50,56]
F1
RTD3_CIO_PW R_EN
POC_GPIO_6
E1
TBT_TEST_EN
R332
100_04
TEST_EN
TBT_TEST_PW G
AB5
R298
100_04
TEST_PWR_GOOD
F4
RESET_N
TBT_RESET_N
[44]
TBT_XTAL_25_IN
D22
NOTE:
XTAL_25_IN
TBT_XTAL_25_OUT
D23
ASSEMBLE R1305, R1368 if DPSRC
XTAL_25_OUT
NOT IN USE
MISC
AB3
EE_DI
TBT_EE_DI
[44]
AC4
TBT_SRC_CFG1
EE_DO
TBT_EE_DO
[44]
TBT_SRC_HPD
AC3
EE_CS_N
TBT_EE_CS_N
[44]
AB4
EE_CLK
TBT_EE_CLK
[44]
B7
PB_RX1_P
A7
PB_RX1_N
A9
PB_TX1_P
B9
PB_TX1_N
A11
PB_TX0_P
B11
PB_TX0_N
A13
PB_RX0_P
B13
PB_RX0_N
Y16
PB_DPSRC_AUX_P
W16
PB_DPSRC_AUX_N
E19
PB_USB2_D_P
D19
PB_USB2_D_N
B4
TBTB_LSTX
PB_LSTX
B5
TBTB_LSRX
PB_LSRX
TBTB_HPD
G2
PB_DPSRC_HPD
F19
PB_USB2_RBIAS
R730
499_1%_04
PB_USB2_RBIAS
D6
MONDC_SVR
A23
ATEST_P
B23
ATEST_N
[44]
DEBUG
E18
USB2_ATEST
[43]
[43,44]
W13
[43]
MONDC_DPSNK_0
W18
MONDC_DPSNK_1
AB2
Title
Title
Title
MONDC_DPSRC
[42] AR_TBT
[42] AR_TBT
[42] AR_TBT
U16A
JHL6340
Size
Size
Size
Document Number
Document Number
Document Number
Y
A3
A3
A3
6-71-PA700-D02A
6-71-PA700-D02A
6-71-PA700-D02A
Date:
Date:
Date:
W ednesday, July 05, 2017
W ednesday, July 05, 2017
W ednesday, July 05, 2017
Sheet
Sheet
Sheet
2
1
Schematic Diagrams
[30]
[30]
[30]
[30]
[30]
[30]
D
[30]
[30]
[30,32,35,38,48]
Sheet 42 of 77
AR_TBT
C
[30]
[30]
R306
1M_04
R321
1M_04
B
A
VCC3V3_FLASH
VCC3V3_LC
VCC3V3_SX_SYS
VCC3V3_S0_SYS
Rev
Rev
Rev
D02A
D02A
D02A
42
42
42
of
of
of
77
77
77
AR_TBT B - 43
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