Silicon Laboratories C8051F41 Series User Manual page 7

6.4. Expansion I/O Connector (J1)
The 24-pin Expansion I/O connector J11 provides access to all signal pins of the C8051F410 device. A small
through-hole prototyping area is also provided. All I/O signals routed to connector J1 are also routed to through-
hole connection points between J11 and the prototyping area (see Figure 2 on page 5). Each connection point is
labeled indicating the signal available at the connection point. See Table 2 for a list of pin descriptions for J1.
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Table 1. Target Board I/O Descriptions
Description I/O
SW1 Reset
SW2 P1.4
SW3 P1.5
Green LED D3 P2.1
Green LED D5 P2.3
Red LED D1 VREGIN
Red LED D2 VDD
Red LED D12 VIO
Table 2. J1 Pin Descriptions
Pin # Description
1 P0.0
2 P0.1
3 P0.2
4 P0.3
5 P0.4
6 P0.5
7 P0.6
8 P0.7
9 P1.0
10 P1.1
11 P1.2
12 P1.3
Rev. 0.2
C8051F41x-DK
Jumper
none
J5[3–4]
J5[7–8]
J5[1–2]
J5[5–6]
J24
J23
J33
Pin # Description
13 P1.4
14 P1.5
15 P1.6
16 P1.7
17 P2.0
18 P2.1
19 P2.2
20 P2.3
21
P2.4
22 P2.5
23 P2.6
24 P2.7
7