Timing Sequence; Power Up Timing Sequence - Newland NLS-EM3296 V4 Integration Manual

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Timing Sequence

Power Up Timing Sequence

VDD
BUZ
TXD
RXD
USB_D+
USB_D-
nTRIG
nRST
1.
In the diagram above, it takes A+B+C (about 400ms) for the engine to power up: A is bootloader execution time
(100ms), B is kernel boot time (50ms) and C is decoding chip initialization time(250ms). Waken-up duration from the
deep low consumption mode is 300ms.
2.
D is reset time. If the Reset signal is not operated when powered on, the startup time should be calculated after VDD
reaches 3.3V.
3.
Ensure that all communication interface data has been transmitted before powering off.
Levels of other signals should be kept low before power-on to prevent abnormal function.
4.
5.
The nTrig signal comes with 100K pull-up. During the period from the power-on to bootloader execution, do not pull
down the nTrig signal. If nTrig is set high and then power the engine on, it should also meet the E duration (E=0~1ms).
19
400ms
100ms 50ms
250ms
E
D
A
B
C
Figure 4-1

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