Data Organization; Sample Format; Table 42: Spectrum Api: Overview Of Data Organization In Memory For Different Channel Configurations; Table 43: Spectrum Api: Data Organization For Different Digital Input Option Configurations - Spectrum M2p.59 Series Hardware Manual

Acquisition modes

Data organization

Data is organized in a multiplexed way in the transfer buffer. If using 2 channels data of first activated channel comes first, then data of
second channel.

Table 42: Spectrum API: overview of data organization in memory for different channel configurations

Activated Ch Ch Ch
Channels 0 1 2
1 channel X
Any allowed active channel, as mentioned in the „Channel Selection" section, will lead to a data stream over time.
1 channel
2 channels X X
Any allowed combination of two channels, as mentioned in the „Channel Selection" section, will lead multiplexed data stream over time with a linear channel ordering. For each sam-
ple point in time the samples are multiplexed with the ascending channel number.
2 channels X
4 channels X X X
Any allowed combination of two channels, as mentioned in the „Channel Selection" section, will lead multiplexed data stream over time with a linear channel ordering. For each sam-
ple point in time the samples are multiplexed with the ascending channel number.
4 channels X X
8 channels X X X
The samples are re-named for better readability. A0 is sample 0 of channel 0, B4 is sample 4 of channel 1, and so on.

Sample format

If the card is using 16 bit A/D samples, the are stored in twos complement in the 16 bit data word. 16 bit resolution means that data is
ranging from -32768...to...+32767.
Up to three digital inputs (provided via the Multi Pupose I/O lines X1, X2 and X3) can be acquired synchronously and stored within the data
samples of any active channel. This will reduce the available resolution of these channel(s) to either 15 bit, 14 bit or 13 bit, depending on
the number of incorporated digital lines. For a detailed description on how to enable additional synchronous digital inputs, please see the
„"Multi Purpose I/O Lines" section later in this manual.
Any channels that will not store any digital inputs within their samples still provide the full 16 bit resolution. :

Table 43: Spectrum API: data organization for different digital input option configurations

Standard Mode 1 digital input enabled
Data bit 16 bit 15 bit
ADC resolution ADC resolution
D15 ADx Bit 15 (MSB) Digital bit 0 (any X input)*
D14 ADx Bit 14 ADx Bit 15 (MSB)
D13 ADx Bit 13 ADx Bit 14
D12 ADx Bit 12 ADx Bit 13
D11 ADx Bit 11 ADx Bit 12
D10 ADx Bit 10 ADx Bit 11
D9 ADx Bit 9 ADx Bit 10
D8 ADx Bit 8 ADx Bit 9
D7 ADx Bit 7 ADx Bit 8
D6 ADx Bit 6 ADx Bit 7
D5 ADx Bit 5 ADx Bit 6
D4 ADx Bit 4 ADx Bit 5
D3 ADx Bit 3 ADx Bit 4
D2 ADx Bit 2 ADx Bit 3
D1 ADx Bit 1 ADx Bit 2
D0 ADx Bit 0 (LSB) ADx Bit 1 (LSB)
* Any X-input can be used as a source for that digital channel, except X0, which is output only.
Ch Ch Ch Ch Ch Samples ordering in buffer memory starting with data offset zero
3 4 5 6 7
A0
X G0
A0
X C0
X A0
X X A0
X X X X X A0
2 digital inputs enabled
14 bit
ADC resolution
Digital bit 0 (any X input)*
Digital bit 1 (any X input)*
ADx Bit 15 (MSB)
ADx Bit 14
ADx Bit 13
ADx Bit 12
ADx Bit 11
ADx Bit 10
ADx Bit 9
ADx Bit 8
ADx Bit 7
ADx Bit 6
ADx Bit 5
ADx Bit 4
ADx Bit 3
ADx Bit 2 (LSB)
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A1 A2 A3 A4 A5 A6
G1 G2 G3 G4 G5 G6
B0 A1 B1 A2 B2 A3
D0 C1 D1 C2 D2 C3
B0 C0 D0 A1 B1 C1
C0 D0 H0 A1 C1 D1
B0 C0 D0 E0 F0 G0
3 digital inputs enabled
13 bit
ADC resolution
Digital bit 0 (any X input)*
Digital bit 1 (any X input)*
Digital bit 2 (any X input)*
ADx Bit 15 (MSB)
ADx Bit 14
ADx Bit 13
ADx Bit 12
ADx Bit 11
ADx Bit 10
ADx Bit 9
ADx Bit 8
ADx Bit 7
ADx Bit 6
ADx Bit 5
ADx Bit 4
ADx Bit 3 (LSB)
Data organization
A7 A8 A9 A10 A11 A12
G7 G8 G9 G1 G1 G1
0 1
B3 A4 B4 A5 B5 A6
D3 C4 D4 C5 D5 C6
D1 A2 B2 C2 D2 A3
H1 A2 C2 D2 H2 A3
H0 A1 B1 C1 D1 E1
...
...
2
...
...
...
...
F1
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