Synchronous I/O - Mixing Analog, Digital, And Counter Scanning; Clock I/O; Digital Triggering; Pattern Triggering - Measurement Computing USB-1808X User Manual

USB-1808X User's Guide
Synchronous I/O – mixing analog, digital, and counter scanning
The USB-1808X can read analog, digital, and counter inputs, and generate up to two analog outputs and one
digital pattern output at the same time. Digital and counter inputs do not affect the overall A/D rate because
these inputs use no time slot in the scanning sequencer.
For example, one analog input channel can be scanned at the full 200 kS/s A/D rate along with digital and
counter input channels. Each analog channel can have a different gain, and counter and digital channels do not
need additional scanning bandwidth if there is at least one analog channel in the scan group. Digital input
channel sampling is done during the dead time of the scan period when no analog sampling is being done.

Clock I/O

The USB-1808X provides one external clock input (
Connect an external clock signal to

The pacer clock is available at

The USB-1808X provides one external clock input (
operations.
Connect an external clock signal to

The pacer clock is available at


Digital triggering

The (for triggering input operations) and
ITRIG
digital trigger inputs. The trigger mode is software-selectable for edge or level sensitive. Edge sensitive mode is
selectable for rising or falling. Level sensitive mode is selectable for high or low.

Pattern triggering

You can also start an input or output scan with a digital pattern trigger using DIO0 – DIO3. The pattern
represents the state of up to four bits on the port.
You specify the pattern and the trigger type with software. Supported trigger types are Above Pattern, Below
Pattern, Equal Pattern, and Not Equal Pattern. The scan begins when the trigger conditions are met.
The base clock is fixed at 100 MHz (10 ns). The trigger pattern must be held for five base clock cycles (50 ns)
to ensure that it is properly detected. The trigger latency is 1 scan clock period + 8 base clock cycles (80 ns).

Mask option

Use a bitmask to specify which bits to include or exclude from the pattern to detect. To include a bit in the
pattern, sets its value to 1. To exclude a bit from the pattern, sets its value to 0. Refer to the pattern and mask
values shown in Figure 9 and Figure 10.
In Figure 9 all mask bits are set to 1, so all the bits are included in the pattern to detect.
ICLKI
.
ICLKI
.
ICLKO
OCLKI
.
OCLKI
.
OCLKO
(for triggering output operations) terminals are external
OTRIG
Figure 9. Trigger mask with all bits included
15
) and one clock output (
ICLKO
) and one clock output (
OCLKO
Functional Details
) for input operations.
) for output