Philips QV14.1E Service Manual page 164

Circuit Diagrams and PWB Layouts
10-2-35 B, FPGA - CONFIGURATION
FPGA - CONFIGURATION
B
BE-RESETn R031B
BE-RESETn
R032B
U005B
XC6SLX25-3FGG484I
NC
E8
NC_1
E10
NC_2
F8
NC_3
F9
NC_4
F10
NC_5
QV14.1E LA 10.
X347
1
2
3
4
5 FPGA-PROG-B
6
7 8
TYPE
+3V3
X012B
3225
RES
VCC
TS
R143B 47
1 3
OE OUT
+3V3
RES
ST
GND
R005B R135B
47
U016B
U016B U016B
VCC
R142B
GND 1 1 47 FPGA-CLK
3 4 1 6
A Y A Y
I040B
R039B 1MEG
I038B
I041B
X015B
1 3
I037B
+VCCO0-FPGA
I036B
R017B 10 FPGA-RESETN
F020B
FPGA-PROG-B
100
RES
FPGA-RESETN
100
RES
G8
NC_7
G9
NC_8
G11
NC_9
H10
NC_10
H11
NC_11
U005B
DBG XC6SLX25-3FGG484I
X309B
F029B
1
F025B
2 G15
TCK
F028B
3 E18
TDI
F027B
4 C18
TMS
F026B
5 A19
TDO
6 N15
+VAUX-FPGA SUSPEND
8 7
TYPE
EN 164
D002B
R171B 470 +3V3
DBG DBG
GREEN
3
FPGA-CCLK
FPGA-CSO-B DBG
FPGA-MOSI FPGA-DONE 1 U001B
FPGA-MISO PDTC114EU
F015B
2
+3V3
I034B
FPGA-MISO R015B 10
C012B 100nF
16V
U014B
FPGA-MOSI VCC
5 2
D Q
FPGA-CLK
FLASH
FPGA-CCLK
6
C
M25P16-VMN6P
FPGA-CSO-B
1
S
3
W
7
HOLD
1 PQ-CLK VSS
XC6SLX25
+3V3
FPGA-MISO
I035B
R016B 10
F016B
C013B 100nF
16V
U015B
F017B
FPGA-MOSI VCC
5 2
D Q
FLASH
F018B
FPGA-CCLK
6
C
F019B W25Q64FVSSIG
FPGA-CSO-B
1
S
3
W
7
HOLD
VSS
F030B
D003B
+3V3
FPGA-LED0 R167B 470
GREEN
D006B
+3V3
FPGA-LED1 R168B 470
GREEN
D007B
+3V3
FPGA-LED2
R169B 470
GREEN
D008B
+3V3
FPGA-LED3 R170B 470
GREEN
JTAG - MISC
BE-RESETn
P15
VFS
LX75 P16
RFUSE
ONLY
R17
VBATT
+3V3-NVT
U013B
VDD
RESET|RESET
GND
back to
2014-Oct-22
div.table
U005B
XC6SLX25-3FGG484I
POWER
D16
VCCAUX_1
+VAUX-FPGA F11
VCCAUX_2
G12
VCCAUX_3
H9
VCCAUX_4
H15
VCCAUX_5
K15
VCCAUX_6
L8
VCCAUX_7
M15
VCCAUX_8
N8
VCCAUX_9
R6
VCCAUX_10
R10
VCCAUX_11
R12
VCCAUX_12
U11
VCCAUX_13
V6
VCCAUX_14
+VCCINT-FPGA
J8
VCCINT_1
J10
VCCINT_2
J12
VCCINT_3
J14
VCCINT_4
K9
VCCINT_5
K11
VCCINT_6
K13
VCCINT_7
L10
VCCINT_8
L12
VCCINT_9
L14
VCCINT_10
BOOT
M9
VCCINT_11
M11
VCCINT_12
M13
Single Dual
VCCINT_13
N10
VCCINT_14
N12
VCCINT_15
N14
VCCINT_16
P9
VCCINT_17
P11
VCCINT_18
P13
8Mb 16Mb VCCINT_19
+VCCO0-FPGA
R14
VCCINT_20
B4
VCCO_0_1
B7
VCCO_0_2
B11
VCCO_0_3
B15
VCCO_0_4
B19
VCCO_0_5
E9
VCCO_0_6
E13
VCCO_0_7
E17
VCCO_0_8
G10
VCCO_0_9
+1V5-BEDDRA-FPGA
G14
VCCO_0_10
C21
VCCO_1_1
E19
VCCO_1_2
G21
VCCO_1_3
J18
VCCO_1_4
L16
VCCO_1_5
L21
VCCO_1_6
N18
VCCO_1_7
R21
VCCO_1_8
U18
VCCO_1_9
+VCCO2-FPGA W21
VCCO_1_10
AA3
VCCO_2_1
AA7
VCCO_2_2
AA11
VCCO_2_3
AA15
VCCO_2_4
AA19
VCCO_2_5
T9
VCCO_2_6
T13
VCCO_2_7
V8
VCCO_2_8
V12
VCCO_2_9
V16
VCCO_2_10
+1V5-BEDDRB-FPGA
W5
VCCO_2_11
C2
VCCO_3_1
F4
VCCO_3_2
F6
VCCO_3_3
G2
VCCO_3_4
J5
VCCO_3_5
L2
VCCO_3_6
L7
VCCO_3_7
N5
VCCO_3_8
R2
VCCO_3_9
U5
VCCO_3_10
W2
VCCO_3_11
+3V3
+3V3
RES
C271B 100nF
16V
3
1 U011B
PDTC144EU
DBG
2
MV UHD HDMI20-420
C9
B
A1
GND_1
A22
GND_2
AA5
GND_3
AA9
GND_4
AA13
GND_5
AA17
GND_6
AB1
GND_7
AB22
GND_8
B5
GND_9
B9
GND_10
B13
GND_11
B17
GND_12
D4
GND_13
D18
GND_14
E2
GND_15
E7
GND_16
E11
GND_17
E15
GND_18
E21
GND_19
G5
GND_20
G18
GND_21
H7
GND_22
J2
GND_23
J9
GND_24
J11
GND_25
J13
GND_26
J15
GND_27
J21
GND_28
K10
GND_29
K12
GND_30
K14
GND_31
L5
GND_32
L9
GND_33
L11
GND_34
L13
GND_35
L18
GND_36
M10
GND_37
M12
GND_38
M14
GND_39
N2
GND_40
N9
GND_41
N11
GND_42
N13
GND_43
N17
GND_44
N21
GND_45
P10
GND_46
P12
GND_47
P14
GND_48
R5
GND_49
R18
GND_50
U2
GND_51
U7
GND_52
U21
GND_53
V4
GND_54
V10
GND_55
V14
GND_56
W7
GND_57
W16
GND_58
W19
GND_59
3 2014-02-21
715RLPCB000000030
19570_120_140603.eps
14-06-03