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Shuttle HOT-559 User Manual

Pentium processor based pci main board
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FCC Notice:
This equipment has been tested and found to comply with the limits for a Class B digital device,
pursuant to Part 15 of FCC Rules. These limits are designed to provide reasonable protection against
harmful interference in a residential installation. This equipment generates, uses and can radiate radio
frequency energy. If not installed and used properly, in strict accordance with the manufacturer's
instructions, may cause harmful interference to radio communications. However, there is no guarantee
that interference will not occur in a particular installation. If this equipment does cause interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures :
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/television technician for help and for additional suggestions.
The user may find the following booklet prepared by the Federal Communications Commission helpful
"How to Identify and Resolve Radio-TV Interference Problems." This booklet is available from the U.S.
Government Printing Office. Washington, DC 20402, Stock 004-000-00345-4
FCC Warning
The user is cautioned that changes or modifications not expressly approved by the manufacturer could
void the user's authority to operate this equipment.
Note : In order for an installation of this product to maintain compliance with the limits for a Class B
device, shielded cables and power cord must be used.
CE Notice:
Following standards were applied to this product, in order to achieve compliance with the electromag-
netic compatibility :
- Immunity in accordance with EN 50082-1: 1992
- Emissions in accordance with EN 55022: 1987 Class B.
NOTICE
Copyright 1997.
All Right Reserved
Manual Ver 1.3
All information, documentation, and specifications contained in this manual are subject to change without
prior notification by the manufacturer.
The author assumes no responsibility for any errors or omissions which may appear in this document nor
does it make a commitment to update the information contained herein.
TRADEMARKS
Intel is a registered trademark of Intel Corporation.
Pentium™ Processor is a registered trademark of Intel Corporation.
PC/AT is a registered trademark of International Business Machine Corporation.
PS/2 is a registered trademark of IBM Corporation.
Adaptec is a registered trademark of Adaptec, Inc.
All other brand and product names referred to in this manual are trademarks or registered trademarks of their
respective holders.
User's Manual
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Summary of Contents for Shuttle HOT-559

  • Page 1 FCC Notice: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy.

  • Page 2: Table Of Contents

    ONTENTS ................3 ESCRIPTION 1.1 Overview ..................3 1.1.1 HOT-559S Layout ............... 4 1.1.1 HOT-559 Layout ................ 5 1.2 Form Factor ..................6 1.3 Microprocessor ................. 6 1.4 Memory .................... 6 1.5 Chipset ....................7 1.6 I/O Controller ................... 8 1.7 Real-Time Clock, CMOS RAM ............

  • Page 3: Description

    This manual applied to two HOT-559 main boards - with (HOT-559S) or without (HOT-559) SCSI onboard. HOT-559 is an Intel 430VX ATX mainboard with 4 PCI/4 ISA slot onboard and HOT- 559S the same with the HOT-559 except provides Adaptec AIC7880 Ultra Wide SCSI adapter onboard and support RAID(Redundant Array of Inexpensive Disks).

  • Page 4: Hot-559S Layout

    1.1.1 HOT-559S Layout 4 User's Manual...

  • Page 5: Hot-559 Layout

    1.1.2 HOT-559 Layout User's Manual...

  • Page 6: Form Factor

    1.2 Form Factor The HOT-559(S) main board is designed to fit into a standard ATX form factor chassis. The ATX form factor does not adhere to the standard ATX guidelines in that the outer dimensions are 305mm x 240mm. Location of the I/O connectors, riser slot, and mounting holes are in strict compliance with the ATX specification.

  • Page 7: Chipset

    The PIIX3 comes in a 208-pin QFP package. IDE Support The HOT-559(S) main board provides two independent high performance bus- mastering PCI IDE interfaces capable of supporting PIO Mode 3 and Mode 4 devices. The system BIOS supports Logical Block Addressing (LBA) translation modes as well as ATAPI (e.g.

  • Page 8: I/O Controller

    BIOS use. The CMOS RAM can be set to specific values or cleared to the system default values using the BIOS SETUP program. Also, The CMOS RAM values can be cleared to the system defaults by using a configuration jumper on the HOT-559(S) main board.

  • Page 9: Main Board Connectors

    There are connectors on-board for Power supply, Floppy, IDE, back panel connector, and front panel I/O. Front panel Connector The HOT-559(S) main board provides header connectors to support function typically located on the chassis bezel. Front panel features support include : Infra-red (IrDA) Port...

  • Page 10: Add-In Board Expansion Connectors

    Back Panel Connectors The back panel provides external access to PS/2 style keyboard and mouse connec- tors as well as two serial and one parallel port, which are integrated on the HOT-559 main board. (please refer to diagram on next page)

  • Page 11: Jumper Settings

    2 Jumper Settings 2.1 Jumper Block Overview The HOT-559(S) main board contains configuration jumpers that make it possible to change the system configuration. The system has been properly configured at the factory. Normally, the only time you will ever change a jumper is if you need to:...

  • Page 12: Cpu Configuration Jp12, Jp14, Jp15 And Jp27

    2.2 CPU Clock Configuration - JP12, JP27, JP14 and JP15 These jumpers allow the HOT-559(S) main board to be switched between different speeds of the Pentium/MMX, AMD, and Cyrix processors. Jumper JP12 is used to set the system bus frequency from 50 MHz to 66 MHz and also affect the PCI clock (system clock /2) speeds.

  • Page 13: Onboard Regulator Output Jp24, Jp25

    Pin 2-3 Close Pin 1-2 Close PR120 2.3 Onbaord Regulator Output- JP24, JP25 HOT-559(S) main board is designed with an advanced onboard switching voltage regulators to provide 3.3V ~3.52V range voltage (V ) for intel Pentium CORE P54C, Cyrix 6x86 and AMD K5 processors; and also provide dual 3.3/2.8V~ 3.3/3.2V ranges voltage (V...

  • Page 14: Other Jumpers Setting

    1-2 for normal operation to retain your new CMOS data. Flash EEPROM Vpp (JP1) HOT-559(S) mainboard supports two types of flash EEPROM: 5 volt and 12 volt. By setting up jumper JP1, you can update both types of flash EPROM with new system BIOS files as they come available.

  • Page 15: Bios And Setup Utility

    3 BIOS and Setup Utility 3.1 Introduction The HOT-559(S) main board uses an Award BIOS, which is stored in Flash EEPROM and easily upgraded using a floppy disk-based program. In addition to the Award BIOS, the Flash EEPROM also contains the Setup utility, Power-on Self Tests (POST), APM 1.2, the PCI auto-configuration utility, and Windows 95 ready Plug and Play.

  • Page 16: The Main Menu

    3.4 The Main Menu Standard CMOS setup This setup page includes all the items in a standard compatible BIOS. BIOS features setup This setup page includes all the items of Award special enhanced features. Chipset features setup This setup page includes all the items of chipset features. Power Management Setup This setup page includes all the items of Power Management features.
  • Page 17 Integrated Peripherals This setup page includes all the items of peripheral features. IDE HDD auto detection Automatically configure IDE hard disk drive parameters. Supervisor Password Change, set, or disable supervisor password. It allows you to limit access to the system and Setup, or just to Setup.

  • Page 18: Standard Cmos Setup

    3.5 Standard CMOS Setup Date The date format is <day>, <month> <date> <year>. Press <F3> to show the calendar. Time The time format is <hour> <minute> <second>. The time is calculated base on the 24-hour military-time clock. For example. 5 p.m. is 17:00:00. Drive C type/Drive D type This item identify the types of hard disk drive C and drive D that has been installed in the computer.
  • Page 19 Drive A type/Drive B type This item specifies the types of floppy disk drive A or drive B that has been installed in the system. Video This item selects the type of adapter used for the primary system monitor that must matches your video display card and monitor.

  • Page 20: Bios Feature Setup

    3.6 BIOS Features Setup CPU Internal Cache This item enables CPU internal cache to speed up memory access. External Cache This item enables the external cache to speed up memory access. Quick Power On Self Test This item speeds up Power On Self Test (POST) after you power on the computer. If it is set to Enabled, BIOS will shorten or skip some check items during POST.
  • Page 21 Boot Up System Speed This option sets the speed of the CPU at system boot time. The settings are High or Low. Typematic Rate Setting This determines if the typematic rate is to be used. when disabled, continually holding down a key on your keyboard will generate only one instance. In other words, the BIOS will only report that the key is down.

  • Page 22: Chipset Features Setup

    3.7 Chipset Features Setup Auto Configuration This item auto configure the following items: DRAM RAS# Precharge time, DRAM R/W Leadoff Timing, Fast RAS to CAS Delay, DRAM Read Burst, DRAM Write Burst Timing, Fast MA to RAS# Delay CLK, Fast EDO Path Select, Refresh RAS# Assertion, and ISA Bus Clock by different system clock.
  • Page 23 Fast RAS To CAS Delay When DRAM is refreshed, both rows and columns are address separately. This setup item allows you to determine the timing of the transition from Row Address Strobe (RAS) to Column Address Strobe (CAS). The options are 3 and 2 CLKs. DRAM Read Burst (EDO/FP) This item set the EDO/FP DRAM Read Burst Timing.
  • Page 24 8 Bit I/O Recovery Time The recovery time is the length of time, measured in CPU clocks, which the system will delay after the completion of an input/output request. This delay takes place because the CPU is operating so much after than the input/output bus that the CPU must be delayed to allow for the completion of the I/O.

  • Page 25: Power Management Setup

    3.8 Power Management Setup Power Management This item determines the options of the power management function. Default value is Disable. The following pages tell you the options of each item & describe the meanings of each options. Disabled Global Power Management will be disabled. User Define Users can configure their own power management.
  • Page 26 Disable System will never enter DOZE mode. Standby Mode 1 Min~1 Hr Defines the continues idle time before the system enters STANDBY mode. Disable System will never enter STANDBY mode. Suspend Mode 1 Min~1 Hr Defines the continuous idle time before the system enters SUSPEND mode.

  • Page 27: Pci Configuration Setup

    3.9 PCI Configuration Setup PNP OS Installed When this item is set to Yes, it will allow the PnP OS(Windows 95) control the system resources except PCI devices and PnP boot devices. Default setting is No. Resources Controlled By The Award Plug and Play BIOS has the capability to automatically configure all of the boot and Plug and Play compatible devices.
  • Page 28 PCI IRQ Activated by This items sets the method by which the PCI bus recognize that an IRQ service is being requested by a device. Under all circumstances, you should not change the default configuration unless advised otherwise by your system's manufacturer. Choices are Level(default) and Edge.

  • Page 29: Integrated Peripherals

    3.10 Integrated Peripherals IDE HDD Block Mode This item is used to set IDE HDD Block Mode. If your IDE Hard Disk supports block mode, then you can enable this function to speed up the HDD access time. If not, please disable this function to avoid HDD access error.
  • Page 30 On-Chip Primary PCI IDE As stated above, your system includes two built-in IDE controllers, both of which operate on the PCI bus. This setup item allows you either to enable or disable the primary controller. You might choose to disable the controller if you were to add a higher performance or specialized controller.
  • Page 31 Parallel Port Mode This item specifies onboard parallel port mode. The options are SPP (Standard Parallel Port), EPP(Enhanced Parallel Port), ECP (Extended Capabilities Port), and EPP+ECP. ECP Mode Use DMA This item specifies DMA (Direct Memory Access) channel when ECP device is in use. The options are DMA 1 and DMA 3.

  • Page 32: Password Setting

    3.11 Password Setting Supervisor Password and User Password The options on the Password screen menu make it possible to restrict access to the Setup program by enabling you to set passwords for two different access modes: Supervisor mode and User mode. In general, Supervisor mode has full access to the Setup options, whereas User mode has restricted access to the options.
  • Page 33 HOT-559 Pentium Processor Based PCI MAIN BOARD User's Manual...

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