Sony HDVF-C35W Maintenance Manual page 53

CN3
1 GND
2 GND
3 +5V(BL)
4 +5V(BL)
5 GND
6 +5V(TALLY)
7 GND
8 GND
9 +3.0V
10 +3.0V
11 GND
12 GND
13 +3.3V
14 +3.3V
15 GND
16 GND
17 +1.8V(IP)
18 +1.8V(IP)
19 GND
20 GND
21 +1.5V
22 +1.5V
23 GND
24 GND
25 +3.3V(A/D)
26 +3.3V(A/D)
27 GND
28 GND
29 +1.8V(A/D)
30 +1.8V(A/D)
31 GND
32 GND
33 Y(X)
34 Y(G)
35 Pb(X)
36 Pb(G)
37 Pr(X)
38 Pr(G)
39 -
40 -
44 43 42 41
CN4
1 SCK
2 FPGA_SDA(3.3V)
3 FPGA_SCL(3.3V)
4 CPU_INT
5 CONFIG_DONE
6 nCONFIG
7 nCE
8 nCSO
9 ASDO
10 DCLK
11 DATA0
12 H SYNC
13 V SYNC
14 UP TALLY
15 CS1(FPGA)
16 CS2(iChips)
17 CS3(OSD)
18 CS4(LCD_FPGA)
19 CS5(LCD)
20 SCK
21 STX
22 SRX
23 SDA(3.3V)
24 SCK(3.3V)
25 H SYNC(SEP)
26 V SYNC(SEP)
27 O/E(SEP)
28 CPU_RESET
29 CPU_CLOCK
30 GND
34 33 32 31
HDVF-C35W
A B
GND
+5.0V_BL
+5.0V_TALLY
GND
C401 C402
0.1uF 1uF D401 D402
SLI-343URCT32WST
SLI-343URCT32WST
GND
+3.0V
GND
+3.3V
GND
+1.8V_IP
GND
+1.5V
GND
+3.3V_A/D
GND
+1.8V_A/D
Y(X) 001
Pb(X) 001
Pr(X) 001
R404
0
GND
R405 GND
0
SUFFIX -12: C407 22pF
SUFFIX -11: R403 22pF
FPGA_SDA_I2C 002
GND
FPGA_SCL_I2C 002
CPU_INT 002
EPR2_CONFIG_DONE 002
EPR2_nCONFIG 002
EPR2_nCE 002
EPR2_nCS 002
EPR2_ASDI 002
EPR2_DCLK 002
EPR2_DATAOUT 002
H_SYNC 002
V_SYNC 002
CS_FPGA 002
CS_IP 003
CS_OSD 002
CS_CPLD 005
CS_LCD 005
SPI_SCLK 002
SPI_STD
002,003,005
SPI_SRD 002,003,005
3.3V_SDA_I2C 001,002
3.3V_SCL_I2C 001,002
H_SYNC_SEP 002
V_SYNC_SEP
002
O/E_FIELD_SEP 002
CPU_RESET 002
CPU_CLOCK 002
GND
C
PR-309 (5/5) PR-309 (5/5)
SUFFIX: -11, 12 SUFFIX: -11, 12
FL400
EMI
1 2
IN1 OUT1
C_LCD[9] 3 4
IN2 OUT2
C_LCD[8] 5 6
IN3 OUT3
C_LCD[7] 7 8
IN4 OUT4
G1 G2
9 10
GND
FL401
EMI
C_LCD[6] 1 2
IN1 OUT1
C_LCD[5] 3 4
IN2 OUT2
5 6
C_LCD[4]
IN3 OUT3
C_LCD[3] 7 8
IN4 OUT4
G1 G2
9 10
GND
FL402
EMI
1 2
C_LCD[2]
IN1 OUT1
C_LCD[1] 3 4
IN2 OUT2
C_LCD[0] 5 6
IN3 OUT3
Y_LCD[9] 7 8
IN4 OUT4
G1 G2
9 10
GND
FL403
EMI
Y_LCD[8] 1 2
IN1 OUT1
Y_LCD[7] 3 4
IN2 OUT2
Y_LCD[6] 5 6
IN3 OUT3
7 8
Y_LCD[5]
IN4 OUT4
G1 G2
10
9
GND
FL404
EMI
Y_LCD[4] 1 2
IN1 OUT1
3 4
Y_LCD[3]
IN2 OUT2
Y_LCD[2] 5 6
IN3 OUT3
Y_LCD[1] 7 8
IN4 OUT4
G1 G2
9 10
GND
FL405
EMI
Y_LCD[0] 1 2
IN1 OUT1
PCLK_LCD 3 4
IN2 OUT2
HD_LCD 5 6
IN3 OUT3
7 8
VD_LCD
IN4 OUT4
G1 G2
10
9
GND
TP401 TP402
VD_LCD
HD_LCD
002 FPGA_LCD
FL406
EMI
1 2
IN1 OUT1
3 4
IN2 OUT2
5 6
IN3 OUT3
7 8
IN4 OUT4
G1 G2
10
9
GND
005 CS_CPLD
FL407
005 SPI_SRD
EMI
1 2
002 LCD_RESET IN1 OUT1
R408 0
3 4
IN2 OUT2
5 6
005 SPI_STD IN3 OUT3
R412 0
7 8
005 CS_LCD IN4 OUT4
G1 G2
9 10
SUFFIX -12
GND
+3.3V
C400
0.1uF
5
GND VCC
4 2
OUTY INA
IC400
1
TC7SZ125FU(TE85R)
G
GND
3
GND
7-9 7-9
D E
CN5
I_LCD_C9
I_LCD_C8
I_LCD_C7
I_LCD_C6
I_LCD_C5
I_LCD_C4
I_LCD_C3
I_LCD_C2
I_LCD_C1
I_LCD_C0
I_LCD_Y9
I_LCD_Y8
I_LCD_Y7
I_LCD_Y6
I_LCD_Y5
I_LCD_Y4
I_LCD_Y3
I_LCD_Y2
I_LCD_Y1
I_LCD_Y0
I_LCD_CLK
I_LCD_HD
I_LCD_VD
I_LCD_XRST
I_EVF_SCLK
I_EVF_STX
I_LCD_SCS
O_LCD_SRX
I_CAM_AU_SCS
+3.0V
VDD1
VDD1
C403 R401 R402
C404
0.1uF 0 0
1uF
GND1
NM
GND1
GND
NC
+5.0V_BL
VDD2
VDD2
C405
C406
1uF 0.1uF
GND2
GND2
VDD1
GND
NC
41 42 43 44 45 46 47 48 49
R400
0
NM
GND
JC401
0
F G
1
1
2
3
4
5
6
7
2
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
3
28
29
30
31
32
33
34
35
36
37
38
39
40
50 51
GND
4
5
PR-309 (5/5)
BOARD NO. 1-873-970-11, 12
H