Digital Display Sub-System (Dss) Or Ttl Interface - TechNexion PICO-IMX6UL-EMMC Hardware Manual

PICO-IMX6UL-EMMC REV. A1. HARDWARE MANUAL – VER 1.00 – MAR 28 2016

3.2. Digital Display Sub-System (DSS) or TTL Interface

The Parallel Display interface of PICO-IMX6UL-EMMC is derived from the eLCDIF subsystem. The
eLCDIF is a general purpose display controller used to drive a wide range of display devices varying
in size and capability. The eLCDIF is designed to support dumb (synchronous 24-bit Parallel RGB
interface) and smart (asynchronous parallel MPU interface) LCD devices.
The block has several major features:

Bus master interface to source frame buffer data for display refresh. This interface can also
be used to drive data for "Smart" displays.

PIO interface to manage data transfers between "Smart" displays and SoC.

8/16/18/24/32 bit LCD data bus support available depending on I/O mux options.

Programmable timing and parameters for MPU, VSYNC and DOTCLK LCD interfaces to
support a wide variety of displays.

ITU-R BT.656 mode (called Digital Video Interface or DVI mode here) including progressive-
to-interlace feature and RGB to YCbCr 4:2:2 color space conversion to support 525/60 and
625/50 operation.
For additional details, please refer to the "Enhanced LCD Interface" chapter and the "Pixel Pipeline
(PXP)" chapter of the "i.MX6Ultralite Application Processor Reference Manual".
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