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Backplane
Size .........................................................3U-sized; one system slot (with
Backplane bare-board material ...............UL 94 V-0 Recognized
Backplane connectors .............................Conforms to IEC 917 and
RoHS ......................................................8-slot PXI backplane is
10 MHz System Reference Clock (PXI_CLK10)
Maximum clock skew
between slots...........................................250 ps
Built-in 10 MHz clock
External clock sources
8-Slot PXI Backplane Installation Guide
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Accuracy..........................................±25 ppm (guaranteed over the
Maximum jitter................................5 ps RMS in 10 Hz to 1 MHz
Connectors.......................................Connector J1 on rear of backplane
Input frequency................................10 MHz ±100 ppm or better
Input amplitude
Rear connector..........................200 mV
Slot 2 ........................................5 V or 3.3 V, 10 MHz TTL signal
Input impedance ..............................50 Ω ± 5 Ω (rear connector)
Maximum jitter introduced
by backplane circuitry .....................1 ps RMS in 10 Hz to 1 MHz
8
three system expansion slots)
and seven peripheral slots.
Compliant with IEEE 1101.10
mechanical packaging.
PXI Specification Revision 2.0
compliant. Accepts both PXI and
CompactPCI (PICMG 2.0 R 3.0)
3U modules.
IEC 1076-4-101, and are
UL 94 V-0 rated
RoHS-compliant
operating temperature range)
range
(ground referenced) or Slot 2 J2
(pin D17)
to 5 V
, 10 MHz
pp
pp
squarewave or sinewave
range
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