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PCI 9054RDK-LITE
Hardware Reference Manual

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Summary of Contents for PLX Technology PCI 9054RDK-LITE

  • Page 1 PCI 9054RDK-LITE Hardware Reference Manual...
  • Page 3 PCI 9054RDK-LITE Hardware Reference Manual Version 1.3 January 2006 Website: http://www.plxtech.com Technical Support: http://www.plxtech.com/support/ Phone: 408 774-9060 800 759-3735 Fax: 408 774-2169...
  • Page 4 © 2006 PLX Technology, Inc. All rights reserved. PLX Technology, Inc. retains the right to make changes to this product at any time, without notice. Products may have minor variations to this publication, known as errata. PLX assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of PLX products.
  • Page 5: About This Manual

    BOUT ANUAL This document describes the PLX PCI 9054RDK-LITE Rapid Development Kit from a hardware perspective. It contains a description of all major functional circuit blocks on the board. This manual also includes the complete schematics and bill of materials.
  • Page 7: Table Of Contents

    3.9.2 Three Common BGA Landscapes ..................12 3.10 Power Supply..........................13 3.11 Configuring the RDK board ...................... 13 3.11.1 Booting the PCI 9054RDK-Lite with No EEPROM or a Blank EEPROM ......14 PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 8 ILL OF ATERIALS CHEMATICS IST OF IGURES Figure 1-1. PCI 9054RDK-LITE Layout Diagram ..................1 Figure 2-1. PCI 9054RDK-LITE System Architecture .................. 3 Figure 3-1. PCI 9054RDK-LITE Hardware Block Diagram................4 Figure 3-2. BGA Landscapes ........................12 IST OF ABLES Table 3-1.
  • Page 9: General Information

    25x25x1mm BGA2 footprint SOIC BGA3 landscape landscape EEPROM 9054 3.3 volt rail 3.3 volt rail DC/DC ground rail ground rail Figure 1-1. PCI 9054RDK-LITE Layout Diagram PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 10: Features

    5 volt only PCI slot • Six logic analyzer headers with standard HP footprint to allow easy probing of Processor/Local Bus signals. PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 11: System Architecture

    Flash ROM Socket Test Headers Reset Circuitry J Mode RS232 Interface Connector PCI 9054 PCI Bus, 32 Bit, 33 MHz Figure 2-1. PCI 9054RDK-LITE System Architecture PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 12: Hardware Architecture

    3. HARDWARE ARCHITECTURE This section provides a detailed description of the hardware of the PCI 9054RDK-LITE. Figure 3-1 shows the hardware block diagram of the RDK. RS232 Interface 4 Status LEDs Programmable Socket for Flash ROM Transceiver Reset DB9 Male...
  • Page 13: Hardware Memory Map

    3.1 Hardware Memory Map The PCI 9054RDK-LITE board Processor/Local Bus memory map is shown in Table 3-1. Table 3-1. PCI 9054RDK-LITE Memory Map Chip Select Address Range Device Comments FFFF FFFF Unused Available 8000 0000 7FFF FFFF Unused CS3# Available &...
  • Page 14: Direct Master

    Complete messaging unit mailbox and doorbell registers • Queue management pointers, which can be used for message passing under the I protocol or a custom protocol PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 15: Table 3-2 Long Serial Eeprom Load Registers

    MSW of PCI Configuration Address Register for 0000 DMCRGA[31:16] Direct Master-to-PCI I/O Configuration LSW of PCI Configuration Address Register for 0000 DMCFGA[15:0] Direct Master-to-PCI I/O Configuration PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 16: Table 3-3. Extra Long Serial Eeprom Load Registers

    LSW of Bus Region Descriptors for 01C3 LBRD1[15:0] PCI-to-Local Address Space 1 0000 MSW of Hot Swap Control Register Reserved 4C06 LSW of Hot Swap Control Register HS_NEXT[7:0] / HS_CNTL[7:0] PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 17: Synchronous Sram

    PCI 9054 LHOLD signal, and it generates bus grant signals, LBG[1:0], to the Processor/Local Bus masters, and LHOLDA to PCI 9054 chip. PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 18: Plx Option Module Connector

    As long as an active low signal can sink 16 – 20 mA of current, it can directly drive the LEDs without changing the resistor value. PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 19: Prototyping Area

    0.5mm IDT RC32364 160-pin PQFP 0.65mm FPGAs, PPC403GA, MCF5206e 176-pin PQFP 0.5mm SH7410 208-pin PQFP 0.5mm FPGAs, SH7707/7709/7750, ADSP 20165L 240-pin PQFP 0.5mm FPGAs, ADSP 21061L/21062L PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 20: Three Common Bga Landscapes

    It should fit snugly. BGA Device Solder Ironwood BGA Land Socket 0.014" Plug Ironwood Minigrid Socket (Optional) Solder 0.018" Target PCB Figure 3-2. BGA Landscapes PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 21: Power Supply

    8, with the other end of the wire soldered to the top of C3 (or C11), approximately 1 cm distant from pin 8. PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 22: Booting The Pci 9054Rdk-Lite With No Eeprom Or A Blank Eeprom

    RN4 is already grounded, pin 5 can be soldered to pin 6 to ground one leg of the resistor. A wire can then be soldered to connect R71 to RN4-4. PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 23: Examples Of Testing The O N Board 32K X 32 Sram With Plxm On

    Type in dl s0 to compare the data from el s0+c 44444444 step ‘g’. el s0+10 55555555 el s0+14 66666666 el s0+18 77777777 el s0+1c 88888888 PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 25: Cpld Verilog Code

    // bus hold request from PLX PCI9054 LHOLDA, // bus hold acknowledge LBR, // two local bus request LBG, // two local bus grant // chip selects // four chip select outputs PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 26 (ADDR_4MSBS == 4'b0110) ? 4'b1011: (ADDR_4MSBS == 4'b0111) ? 4'b0111: 4'b1111; // byte enable encode for SRAM write cycles wire [3:0] SRAM_BW_ =({LWDRD_,A31_28}=='b1_0010) ? LBE_[3:0] : 4'b1111; PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 27 @ (posedge CLK_50MHZ) if (!ADS_) SRAM_ADDR[16:2] = ADDR_IN[16:2]; else if (BLAST_ && !((currentstate == s1) && LWDRD_)) SRAM_ADDR[12:2] = SRAM_ADDR[12:2] +1; else SRAM_ADDR[16:2] = SRAM_ADDR[16:2]; PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 28 = s5; s5: if (BLAST_) nextstate = s5; else nextstate = s6; s6: if (!ADS_) nextstate = s1; else nextstate = s0; endcase //output logic PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 29 (LWDRD_==0) SRAMOE_=0; else SRAMOE_=1; s5: begin oer=0; SRAMCS_=0; if (LWDRD_==0) SRAMOE_=0; else SRAMOE_=1; s6: begin oer=1; SRAMCS_=1; SRAMOE_=1; endcase always @(posedge CLK_50MHZ) currentstate <= nextstate; endmodule PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 31: Bill Of Materials / Schematics

    The PCI 9054 is available in both the 225-pin PBGA and the 176-pin PQFP packages. The schematics of PCI 9054RDK-LITE only show the 176-pin PQFP chip installed on the RDK board. The PCI 9054 signal names used in the schematics are the C mode signal names, except for the POM connector, which uses J mode signal names.
  • Page 32 R9, R10, R22, 11 Panasonic ERJ-6GEYJ103V Res. 1/10W, 10K, 5% SMT, 0805 Digi-Key R23, R25, R31, Panasonic ERJ-6GEYJ392V Res. 1/10W, 3.9K, 5% SMT, 0805 Digi_key PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 33 SUBSTITUTE VENDOR AND PART LIST IC, 3A, 5V to 3.3V LDO SMT, 3-lead plastic Future Semtech EZ1587CM-3.3 regulator TO-263 Electronics Product name: PCI 9054RDK-LITE PLX Part #: 91-0006-010-A PCI 9054RDK-LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 34 PCI 9054RDK- LITE Hardware Reference Manual v1.3 © 2006 PLX Technology, Inc. All rights reserved.
  • Page 35 PG 4 PG 4 PG 4 PG 6 PG7-PG12 LOCAL BUS PCI9054 PG 3 PCI BUS ( PCI Edge connector, PG 2) PLX TECHNOLOGY, INC. 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com Title Electrical Block Diagram Size Document Number Custom PCI9054RDK-LITE...
  • Page 36 0.022uF 3.3VB41 3.3VB43 3.3VB54 3.3VAUX 0.01uF 10uF 0.1uF 10uF 0.01uF 0.01uF 0.01uF 0.01uF 0.01uF PLX TECHNOLOGY, INC. 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com Title PCI Card Edge Connector Size Document Number Custom PCI9054RDK-LITE Date: Thursday, October 21, 2004 Sheet...
  • Page 37 LVCC LCLK It is not installed as default. 3.3VCC CLK1 50MHz OSC (1/2size) CLK_50MHZ 4 CLK2 10uF 0.1uF PLX TECHNOLOGY, INC. OSC_CLK SRAM_CLK 4 CLK3 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com POM_CLK CLK4 Title PCI9054 PCI I/O Accelerator CLKOUT...
  • Page 38 100-pin TQFP MT58LC32K32B4-TQFP100 PB51 are not installed as PB50 defualt 3.3VCC 3.3VCC 3.3VCC Decoupling Capacitors for U9 Decoupling Capacitors for U12 PLX TECHNOLOGY, INC. 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com 0.1uF 0.1uF 0.1uF 0.1uF 0.01uF 0.01uF 0.01uF 0.01uF 0.1uF 0.1uF...
  • Page 39 AD09 EESCL LAD8 AD08 +12V +12V -12V -12V PLX Option Module 1 (POM1) 2X50 Connector PLX TECHNOLOGY, INC. 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com Title PLX Option Module Connector Size Document Number Custom PCI9054RDK-LITE Date: Thursday, October 21, 2004...
  • Page 40 PK51 PK61 PK52 PK60 PK53 PK59 PK54 PK58 PK55 PK57 PK56 Logic Analyzer Header PLX TECHNOLOGY, INC. 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com Title Logic Analyzer Test Headers Size Document Number Custom PCI9054RDK-LITE Date: Thursday, October 21, 2004 Sheet...
  • Page 41 PC79 PF13 PF20 PF29 PC80 PF12 PF21 PF28 PC80 PF12 PF21 PF28 PC81 PF11 PF22 PF27 PLX TECHNOLOGY, INC. PC81 PF11 PF22 PF27 PC82 PF10 PF23 PF26 PC82 PF10 PF23 PF26 PC83 PF24 PF25 870 Maude Ave, Sunnyvale, CA 94085...
  • Page 42 PG193 PG44 PG94 PG144 PG194 PG41 PG140 PG44 PG94 PG144 PG194 PG45 PG95 PG145 PG195 PG42 PG139 PLX TECHNOLOGY, INC. PG45 PG95 PG145 PG195 PG46 PG96 PG146 PG196 PG46 PG96 PG146 PG196 PG47 PG97 PG147 PG197 870 Maude Ave, Sunnyvale, CA 94085...
  • Page 43 PCB under the footprint of 240-pin PQFP (FP16). They are arranged as FP19 inside of FP20 and FP20 inside of FP18. All of them PLX TECHNOLOGY, INC. share prototyping holes with FP16. 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com...
  • Page 44 PH46 PH96 PH146 PH196 PH[1:208] PH47 PH97 PH147 PH197 PH47 PH97 PH197 PH147 PH48 PH98 PH148 PH198 PLX TECHNOLOGY, INC. PH48 PH98 PH148 PH198 PH49 PH99 PH149 PH199 PH49 PH99 PH149 PH199 PH50 PH100 PH150 PH200 Note: three footprints are placed on the component...
  • Page 45 PJ49 PJ77 VSS2 PJ115 VSS3 PJ50 VSS3 PJ116 VSSQ1 PJ51 VSSQ1 PJ117 VSSQ2 PJ52 VSSQ2 PJ118 PLX TECHNOLOGY, INC. VSSQ3 PJ53 VSSQ3 PJ119 PJ24 PJ78 NC/RFU VSSQ4 PJ54 NC/RFU VSSQ4 PJ120 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com Title 256Mb SDRAM...
  • Page 46 PI144 PI45 PI95 PI145 PI45 PI95 PI145 footprint is placed on the solder side directly under FP26. PI46 PI96 PI146 PLX TECHNOLOGY, INC. PI46 PI96 PI146 PI47 PI97 PI147 FP27 also shares prototyping holes with FP26 PI47 PI97 PI147 PI48...
  • Page 47 3. Data Bus Connector (LAH3) 4. Data Bus Connector (LAH4) 5. Address Bus Connector (LAH1) 6. Address Bus Connector (LAH2) 7. Marked as is ptototyping area PLX TECHNOLOGY, INC. 870 Maude Ave, Sunnyvale, CA 94085 www.plxtech.com Title Suggested Board Layout Size...

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