Table 3-4 J3 Connector Pin Assignments - GE NETernity CP921RC–30X Hardware Reference Manual

Compactpci gigabit switch - picmg layers 2 and 3 ipv6 compatible, openware switch management
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Table 3-4 J3 Connector Pin Assignments

where:
42 NETernity CP921RC-30X Hardware Reference Manual
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Pin
A
B
19
18
LPF_DB+
LPF_DB–
17
LPF_DA+
LPF_DA–
16
LP8_DA+
LP8_DA—
15
LP8_DB+
LP8_DB—
14
LP7_DA+
LP7_DA—
13
LP7_DB+
LP7_DB—
12
LP6_DA+
LP6_DA—
11
LP6_DB+
LP6_DB—
10
LP5_DA+
LP5_DA—
9
LP5_DB+
LP5_DB—
8
LP4_DA+
LP4_DA—
7
LP4_DB+
LP4_DB—
6
LP3_DA+
LP3_DA—
5
LP3_DB+
LP3_DB—
4
LP2_DA+
LP2_DA—
3
LP2_DB+
LP2_DB—
2
LP1_DA+
LP1_DA—
1
LP1_DB+
LP1_DB—
LP1_Dn = Port 1, Circuit D(A—D) +
LP2_Dn = Port 2, Circuit D(A—D) +
LP3_Dn = Port 3, Circuit D(A—D) +
LP4_Dn = Port 4, Circuit D(A—D) +
LP5_Dn = Port 5, Circuit D(A—D) +
 Circuit Ground
GND
=
NC = No connection, or option Load Connection to ETH1. The Fabric Link port is 
accessed only when connected to TRCP9xx‐5RC‐F.
C
D
E
NC
NC
NC
NC
LP8_DC+
LP8_DC—
LP8_DD+
LP8_DD—
LP7_DC+
LP7_DC—
LP7_DD+
LP7_DD—
LP6_DC+
LP6_DC—
LP6_DD+
LP6_DD—
LP5_DC+
LP5_DC—
LP5_DD+
LP5_DD—
LP4_DC+
LP4_DC—
LP4_DD+
LP4_DD—
LP3_DC+
LP3_DC—
LP3_DD+
LP3_DD—
LP2_DC+
LP2_DC—
LP2_DD+
LP2_DD—
LP1_DC+
LP1_DC—
LP1_DD+
LP1_DD—
F
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

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