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Using the Interrupt
SYSCLK
(16MHz)
DS0*
DS1*
IACK*
DBEN*
DTACK*
MA(7:0)
MD(15:0)
BUSY*
IRQ*
24 Using the Breadboard
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The Breadboard has a read only Interrupt Register located at address 04
A24 Memory. The contents of this register is used as an interrupt vector to
determine which interrupt source caused the interrupt.
If IACK* (Type C interrupt) is present, the content of the Interrupt Register
will be sent to the data bus and the IRQ* line will be released. Reading the
Interrupt Register will clear the interrupt request signal IRQ* to support
Type A interrupt.
Bits 2 through bit 15 of this register are not used. Bit 1 indicates an external
interrupt existing if the content of bit 1 is "1". See Chapter 3, Register
Description for more information of this Interrupt Register.
IRQ* will be valid whenever the external interrupt occurs.
Figure 2-4 shows the timing for an interrupt acknowledge cycle.
62.5 ns
190 ns
Figure 2-4. Timing for Interrupt Acknowledge Cycle
< 40 ns
62.5 ns
>0
in
h
62.5 ns
62.5 ns
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