Serial Interconnection Between Psoc 5Lp And Psoc 6 Mcu - Cypress CY8CPROTO-062S3-4343W Manual

Psoc 62s3 wi-fi bt prototyping kit
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3.2.3

Serial Interconnection between PSoC 5LP and PSoC 6 MCU

In addition of use as an onboard programmer, the PSoC 5LP functions as an interface for the
USB-UART and USB-I2C bridges, as shown in
are hard-wired to the I2C/UART pins of the PSoC 6 MCU. These pins are also available on the
breadboard compatible I/O headers.
Note: The USB-UART bridge between KitProg3 and PSoC 6 MCU does not support UART hard-
ware flow control by default. Populate R29 and R33 to enable this functionality.
The 10-pin header J11 allows you to program and debug PSoC 6 MCU using an external program-
mer such as MiniProg4. This header has SWD enabled by default but can optionally support JTAG
by removing R21, R30 and populating R37, R38 instead. Note that this will disconnect PSoC 6 MCU
from KitProg3 USB-I2C bridge.
Figure 3-3. Schematics of Programming and Serial Interface Connections
KitProg3 MCU UART with H/W Flow Control
UART_TX
UART_RX
UART_CTS
UART_RTS
KitProg3 MCU I2C
P6_VDD
R27
R32
No Load
R21
I2C_SCL
R30
I2C_SDA
TDO_SWO
TDI
3.2.3.1
BT UART
The board also has a provision to connect the BT core of CYW4343W to the KitProg3 USB-UART
bridge. To do this, remove R53, R64, R29 and R33 and then load R52, R63, R24 and R26. When
connecting to BT UART directly using an external USB-UART bridge or a KitProg3 that is separated
from the board, please ensure to connect VTARG to the level translator's input pin of the external
USB-UART bridge and GND to the corresponding ground pin of the external USB-UART bridge. This
is to ensure proper level translation between the external USB-UART bridge and the CYW4343W.
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A
R53
0 OHM
ARD_D0
R52
0 OHM
BT_UART_RXD
No Load
R64
0 OHM
ARD_D1
R63
0 OHM
BT_UART_TXD
No Load
No Load
R29
0 OHM
ARD_A0
R24
0 OHM
BT_UART_RTS
No Load
No Load
R33
0 OHM
ARD_A1
R26
0 OHM
BT_UART_CTS
No Load
4.7K
No Load
4.7K
0 OHM
MCU_I2C_SCL
0 OHM
MCU_I2C_SDA
R38
0 OHM
MCU_I2C_SCL
No Load
R37
0 OHM
MCU_I2C_SDA
No Load
Figure
3-3. The USB-Serial pins of the PSoC 5LP
UART RX
UART TX
UART RTS
KitProg3 MCU SWD
UART CTS
R35
SWDIO
R43
SWDCLK
R49
RESET
10-pin SWD/JTAG Header
P6_VDD
C5
1uF
TVS1
10V
ESD3V3D5-TP
No Load
No Load
Note: Maximum voltage on P6_VDD is 3.6V. Supplying 5V
through the 10-pin header will permanently damage the device
Hardware
0 OHM
TMS_SWDIO
0 OHM
TCLK_SWCLK
0 OHM
XRES_L_MCU
J11
TMS_SWDIO
1
2
TCLK_SWCLK
3
4
TDO_SWO
5
6
TDI
7
8
XRES_L_MCU
9
10
50MIL KEY ED SMD
No Load
30

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