Siemens SIMATIC S7-400H Manual page 311

Function
Basic communication
Multi-DP master mode
Direct communication
between DP slaves
Equidistance of DP slaves
Synchronizing DP slaves
Deactivating and Activating
DP Slaves
Non-initialized local data
Runtime response
DP cycle time
Delays and blocks
S5 connection
CPU as DP Slave
Automation System S7-400H Fault-tolerant Systems
A5E00068197-07
Differences Between Fault-Tolerant Systems and Standard Systems
Communication functions (system functions) for basic
communication are not supported.
The H-CPUs do not support multi-DP master mode in the
REDUNDANT operating mode.
Cannot be configured in STEP 7
No equidistance for DP slaves in the fault-tolerant system
The synchronization of DP slave groups is not possible.
SFC 11 "DPSYC_FR" is not supported.
It is not possible to deactivate and activate DP slaves.
SFC 12 "D_ACT_DP" is not supported.
When local data are stored in a data area (memory
markers, data blocks, etc.) or if they influence program
execution, the local data have to be initialized.
Non-initialized local data result in a synchronization error on
a fault-tolerant system. The system goes to single mode
with one CPU at STOP.
The command execution time in the case of the
CPU 414-4H and CPU 417-4H is slightly greater than for
the corresponding standard CPU (CPU 414-and
CPU 417-4) (see S7-400 Operations List). This is to be
taken into account in all time-critical applications. You may
need to increase the scan cycle monitoring time.
The DP cycle time is slightly longer for CPU 414-4H and
CPU 417-4H than for corresponding standard CPUs.
During update:
•
the asynchronous SFCs for data records are given a
negative acknowledgement
•
messages are delayed
•
all priority classes up to 15 are initially delayed
•
communications jobs are refused or delayed
•
finally all priority classes are blocked.
For more details refer to Chapter 6.
It is not possible to connect S5 modules via an adapter
module. The connection of S5 modules via an IM 463-2 can
only be made in single mode.
Not possible
Restriction for the Fault-Tolerant CPU
D-3