Table of Contents
Advertisement
Table 2-1 •
LED
1
2
3
4
5
6
7
8
9
10
11
12
Data Generator
The gata generator block generates data for 1553B messages within the demonstration design.
This data are mainly used during Auto mode.
External Memory
Core1553BRM requires a connection memory interface. It supports up to 128 Kbytes of memory,
but it mainly depends on the design. In the demonstration design, the bus arbiter allows the
controller and two cores to access the memory, which provides 64 K words of memory for each of
the cores. The two on-board SRAMs on the M1-embedded Fusion Advanced Development Kit
board are used for that purpose.
Interpreting the HyperTerminal Display
Once programmed with the Core1553BRM demonstration design and the board is powered up, the
HyperTerminal display will give information regarding the core configuration. This information is
displayed in the following form:
Core1553BRM XYZZ
The meaning of these codes depends upon the mode in which the core was powered up.
Auto mode
While in Auto mode:
•
X indicates which BRM core is configured as the bus controller.
•
Y: L = Loopback mode; T = Transceiver mode.
•
ZZ indicates the remote terminal address for the RT.
Example display:
Script mode (Non-Initialization mode)
While in Non-Initialization mode:
•
X: N indicates Non-Initialization mode.
•
Y: L = Loopback mode; T = Transceiver mode.
Demonstration Board LEDs
Board Location
D1
Heartbeat, flashes at 2 KHz
D2
Not used
D3
BRM core 1 busy
D4
BRM core 2 busy
D5
Data compare error
D6
Message of failure interrupt
D7
SRAM1 byte High enable
D8
SRAM1 byte Low enable
D9
SRAM2 byte High enable
D10
SRAM2 byte Low enable
D11
SRAM1 and SRAM2 output enable
D12
SRAM1 and SRAM2 write enable
Core1553BRM 1L02
Interpreting the HyperTerminal Display
Function
17
Advertisement
Table of Contents
