Aiwa XR-MSK3 Service Manual page 30

IC, CXA1992AR
Pin No. Pin Name
1 FEO
2 FEI
3 FDFCT
4 FGD
5 FLB
6 FEO
7 FEM
8 SRCH
9 TGU
10 TG2
11 FSET
12 TAM
13 TAO
14 SLP
15 SLM
16 SLO
17 ISET
18 VCC
19 LOCK
20 CLK
21 XLT
22 DATA
23 XRST
24 COUT
25 SENS1
26 SENS2
27 FOK
28 CC2
29 CC1
30 CB
31 CP
32 RFI
33 RFO
I/O
Output terminal for focus error amplifier. Internally connected to window comparator input for
O
bias condition.
I Input terminal for focus error.
I Capacitor connection terminal for time constant used when there is defect.
This pin is connected to GND via capacitor when high frequency gain of the focus servo is
I
attenuated.
This is a pin where the time constant is externally connected to raise the low frequency gain of the
I
focus servo.
O Focus drive output.
I Focus amplifier inverted input.
This is a pin where the time constant is externally connected to generate the focus search
I
waveform.
This is a pin where the selection time constant is externally connected to set the tracking servo the
I
high frequency gain.
This is a pin where the selection time constant is externally connected to set the tracking high
I
frequency gain.
I Pin for setting peak of the phase compensator of the focus tracking.
I Tracking amplifier inverted input.
O Tracking drive output.
I Sled amplifier non-inverted input.
I Sled amplifier inverted input.
O Sled drive output.
The current which determines height of the focus search, track jump and sled kick is input with
I
external resistance connected.
I Power supply.
I "L" setting starts sled disorder-prevention circuit. (No pull-up resistance) (Connected to VC)
I Clock input for serial data transfer from CPU. (No pull-up resistance)
I Latch input from CPU. (No pull-up resistance)
I Serial data input from CPU. (No pull-up resistance)
I Reset system at "L" setting. (No pull-up resistance)
O Signal output for track number counting.
FZC, DFCT1, TZC, BALH, TGH, FOH, or ATSC is output depending on the command from
O
CPU.
O DFCT2, MIRR, BALL, TGL or FOL is output depending on the command from CPU.
O Output terminal for focus OK comparator.
I Input pin where the DEFECT bottom hold output is capacitance coupled.
O DEFECT bottom-hold output terminal. Internally connected to interruption comparator input.
I Connection terminal for DEFECT bottom-hold capacitor.
I Connection terminal for MIRR hold-capacitor. Anti-reverse input terminal for MIRR comparator.
I Input terminal by capacity combination of RF summing amplifier.
O Output terminal of RF summing amplifier. Checkpoint of Eye pattern.
Description
-30-