Schematics - ZiLOG Z8F08200100KIT User Manual

Schematics

Figure 3 and Figure 4
5
VCC_33V
VCC_33V
GND
GND
D
D2
PA0_T0IN
1 2
RED
D3
PA1_T0OUT
1 2
GREEN
D4
PA2
1 2
YELL
C
20 pin Socket
U7
PA6_SCL
1
PA6/SCL
PA7_SDA
2
PA7/SDA
-RESET
3
RESET
GND
4
GND
XIN
5
XIN
XOUT
6
XOUT
VCC_33V
7
VDD
PA0_T0IN
8
PA0/T0IN
PA1_T0OUT
9
PA1/T0OUT
PA2
10
PA2/DE
Z8F0xx1
B
XIN
XOUT
R13
220
Y1
18.432MHz
R14
100K 18pF
C15 C16
18pF
A
UM015006-1207
displays the schematics for Z8 Encore! XP
4
VCC_33V
+ C12 C13
0.01uF
22uF
GND
R8
100
R9 R10
SW2
VCC_33V GND
100 TEST
100K
R11
100
R12
100
28 pin Socket
U8
PC0_T1IN PC0_T1IN
20 1
PC0/T1IN PC0/T1IN
PB0_ANA0 PA6_SCL
19 2
PB0/ANA0 PA6/SCL
PB1_ANA1 PA7_SDA
18 3
PB1/ANA1 PA7/SDA
VREF -RESET
17 4
VREF RESET
AGND GND
16 5
AGND VSS
VCC_33V XIN
15 6
AVDD XIN
DBG XOUT
14 7
DBG XOUT
PA5_TXD0 VCC_33V
13 8
PA5/TXD0 VDD
PA4_RXD0 PC5_MISO
12 9
PA4/RXD0 PC5/MISO
PA3_CTS0 PC4_MOSI
11 10
PA3/CTS0 PC4/MOSI
PC3_SCK
11
PC3/SCK
PC2_SS
12
PC2/SS
PA0_T0IN
13
PA0/T0IN
PA1_T0OUT
14
PA1/T0OUT
VCC_33V
Z8F0XX2
R3
10K
RESET
-RESET
-RESET
SW1
C10
0.01uF
PB0_ANA0 PB1_ANA1 PB2_ANA2 PB3_ANA3 PB4_ANA4
C17 C18 C19 C20
0.001uF 0.001uF 0.001uF 0.001uF
Figure 3. Schematic for Z8 Encore! XP F0822 Series Flash MCU Evaluation Board
Z8 Encore! XP
® F0822 Series Flash MCU Evaluation Board.
3
connector 2
JP2
1 2
3 4
5 6
7 8
VCC_33V
9 10
PC4_MOSI
11 12
13 14
PC3_SCK
15 16
PC0_T1IN
17 18
GND
19 20
PC1_T1OUT
21 22
23 24
25 26
27 28
29 30
31 32
PA3_CTS0
33 34
PA4_RXD0
35 36
37 38
GND
39 40
41 42
43 44
PA6_SCL
45 46
PA7_SDA
47 48
C4
49 50
51 52
-RESET
53 54
VCC_33V
55 56
0.1uF
57 58
VCC_33V
59 60
PB0_ANA0
28
PB0/ANA0
PB1_ANA1
HEADER 30x2/SM
27
PB1/ANA1
PB2_ANA2
26
PB2/ANA2
PB3_ANA3
25
PB3/ANA3
PB4_ANA4
24
PB4/ANA4
VREF
23
VREF
AGND
22
AVSS
VCC_33V
21
AVDD
DBG
20
DBG
DBG
PC1_T1OUT
19
PC1/T1OUT
PA5_TXD0
18
PA5/TXD0
PA4_RXD0
17
PA4/RXD0
PA3_CTS0
16
PA3/CTS0
PA2
15
PA2/DE
DBG
DBG
PA5_TXD0
PA5_TXD0
PA3_CTS0
PA3_CTS0
PA4_RXD0
PA4_RXD0
J2
PB0_ANA0
1
PB1_ANA1
3
C14 PB2_ANA2
+
5
C21 22uF C22 PB3_ANA3
7
0.001uF 0.01uF PB4_ANA4
9
AGND
Header 5x2
®
F0822 Series Flash MCU Development Kit
2 1
GND
PC5_MISO
PC2_SS
PA0_T0IN
PA1_T0OUT
PA2
GND
PA5_TXD0
GND
If Module is plugged onto the Dev Platform the local
RS232 interface is disabled by pin 50 of JP2
-DIS_232
-DIS_IrDA
-DIS_IRDA
GND
connector 1
for
reference
only
JP1
1 2
3 4
-TRSTN
5 6
-F91_WE
7 8
VCC_33V
GND 9 10
A6 A0
11 12
A10 A3
13 14
VCC_33V
GND
15 16
A8
A7
17 18
A13
19 20 A9
A15 A14
21 22
A18 A16
23 24
A19 GND
25 26
A2 A1
27 28
A11
A12
29 30
A4 A20
31 32
A5 A17
33 34
-DIS_FLASH
35 36
A21 VCC_33V
37 38
A22 A23
39 40
-CS0 -CS1
41 42
-CS2 43 44 D0
D1 D2
45 46
D3 D4
47 48
D5 GND
49 50
D7 D6
51 52
-MREQ -IOREQ
53 54
2
GND -RD
55 56
4
-WR -INSTRD
57 58
6
-BUSACK -BUSREQ
59 60
8
10
HEADER 30x2/SM
User Manual
10
D
C
VCC_33V
B
A
Schematics