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Summary of Contents for Cypress CapSense CY8CMBR2044
- Page 1 AN66308 - CY8CMBR2044 ® CapSense Design Guide Doc. No. 001-66308 Rev. *F Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 Phone (USA): 800.858.1810 Phone (Intnl): 408.943.2600 http://www.cypress.com...
- Page 2 (“Unintended Uses”). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products.
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Page 3: Table Of Contents
Contents Introduction ..................................5 Abstract ................................. 5 Cypress’s CapSense Documentation Ecosystem ....................5 CY8CMBR2044 CapSense Express™ Device Features ..................7 Document Conventions ............................9 CapSense Technology ..............................10 CapSense Fundamentals ............................ 10 Capacitive Sensing Method ..........................11 2.2.1 CapSense Sigma-Delta (CSD) ....................... 11 SmartSense Auto-Tuning ............................ - Page 4 Contents ESD Protection ..............................31 4.2.1 Prevent ..............................31 4.2.2 Redirect ..............................31 4.2.3 Clamp ..............................31 Electromagnetic Compatibility (EMC) Considerations ..................32 4.3.1 Radiated Interference ..........................32 4.3.2 Conducted Immunity and Emissions ....................... 32 PCB Layout Guidelines ............................32 Low-Power Design Considerations ...........................
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Page 5: Introduction
1. Introduction Abstract ® This document describes how to implement capacitive sensing functionality using Cypress’s CapSense Express CY8CMBR2044 device. The following topics are covered in this guide: Features of the CY8CMBR2044 CapSense principles of operation Configuration options of the CY8CMBR2044 device ... - Page 6 Introduction Figure 1-1. Typical CapSense Product Design Flow 1. Understand CapSense technology = Topics covered in this document 2. Specify system requirements and characteristics = Applicable to MBR family of devices only † = Applicable to programmable devices only 3. Select CapSense device based on required functionality Design for CapSense 6.
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Page 7: Cy8Cmbr2044 Capsense Express™ Device Features
This document CY8CMBR2044 CapSense Express™ Device Features Cypress’s CY8CMBR2044 is an ultra-low power device that can quickly and easily add CapSense capacitive touch sensing to your user interface. This device uses hardware to perform system configuration, eliminating the need for software tools, firmware development and device programming. - Page 8 Introduction Wide parasitic capacitance C range ( 5 pF – 40 pF) System Diagnostics of CapSense buttons – reports any faults at device power-up Button shorted to Ground Button shorted to V Button to button short ...
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Page 9: Document Conventions
Introduction Document Conventions Convention Usage Displays file locations, user entered text, and source code: Courier New C:\ ...cd\icc\ Displays file names and reference documentation: Italics Read about the sourcefile.hex file in the PSoC Designer User Guide. Displays keyboard commands in procedures: [Bracketed, Bold] [Enter] or [Ctrl] [C] Represents menu paths:... -
Page 10: Capsense Technology
2. CapSense Technology CapSense Fundamentals CapSense is a touch sensing technology that works by measuring the capacitance of each input pin on the CapSense controller that has been designated as a sensor. As shown in Figure 2-1, the total capacitance on each of the sensor pins can be modeled as equivalent lumped capacitors with values of C through C for a design with n... -
Page 11: Capacitive Sensing Method
CapSense Technology Figure 2-2. Section of typical CapSense PCB with the Sensor being activated by a Finger In addition to the parallel plate capacitance, a finger in contact with the overlay causes electric field fringing between itself and other conductors in the immediate vicinity. Typically, the effect of these fringing fields is minor, and it can usually be ignored. - Page 12 CapSense Technology Figure 2-3. CSD Block Diagram CY8CMBR2044 Precharge Clock Vref IDAC Rbus High-Z Sigma-Delta input AMUX Converter sensor Cmod = External Connection In maintaining the average AMUX voltage at a steady state value (V ), the sigma-delta converter matches the average charge current (I ) to I by controlling the bit stream duty cycle.
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Page 13: Smartsense Auto-Tuning
CapSense Technology SmartSense Auto-Tuning Tuning the touch-sensing user interface is a critical step in ensuring proper system operation and a pleasant user experience. In the typical design flow, the button interface is tuned in the initial design phase, during system integration, and before the production ramp. - Page 14 CapSense Technology Figure 2-7. Typical Capacitive Interface Design Cycle Comparison CapSense® Express with SmartSense™ Auto-Tuning based Typical capacitive user interface Design Cycle capacitive user interface Design Cycle Schematics PCB Layout Mechanical Design Feasibility Firmware Feasibility Design Design Review Review Study Development Study Schematics...
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Page 15: Capsense Schematic Design
3. CapSense Schematic Design CY8CMBR2044 Configuration Options Cypress’s CY8CMBR2044 enables you to implement capacitive touch sensing using only hardware. This section provides an overview of the CapSense controller pins and how to configure them. Figure 3-1. CY8CMBR2044 Pin Diagram CapSense Buttons (CSx) The CY8CMBR2044 controller has four capacitive sense inputs, CS0–CS3. -
Page 16: Button Auto Reset (Arst)
CapSense Schematic Design Button Auto Reset (ARST) Button Auto Reset determines the maximum time a GPOx is driven when CSx is continuously touched. This feature prevents a button from getting stuck if a metal object s placed too close to it. The ARST period can be configured to be 5 seconds or 20 seconds. -
Page 17: Flanking Sensor Suppression (Fss)
CapSense Schematic Design Figure 3-3. Example of Toggle ON/OFF Feature GPO0 Flanking Sensor Suppression (FSS) FSS helps to distinguish closely spaced buttons by allowing only one CSx to be in the TOUCH state at a time. If a finger contacts multiple CSx buttons, only the first one to sense a TOUCH state will turn ON. FSS also is useful when a button can produce opposite effects –... -
Page 18: Led On Time
CapSense Schematic Design Figure 3-5. FSS Implementation, Multiple Buttons Touched LED ON Time LED ON Time specifies the duration for which GPOx is driven low after CSx is released. LED ON Time can range from 0 ms to 2000 ms. Figure 3-6. -
Page 19: System Diagnostics
CapSense Schematic Design Table 3-3. R Value for LED ON Time DELAY Approx. LED ON Time DELAY (Ω) (ms) Grounded … … 7960 1980 8040 2000 > 8040 2000 Pulled to V 2000 Floating 2000 Place R between the Delay pin and ground. LED ON Time varies from device to device. It is ±12% accurate at DELAY room temperature and ±18% accurate at a temperature range of -40 °C to +85 °C. - Page 20 CapSense Schematic Design Button Shorted to Ground If any button is found to be shorted to ground, it is disabled. Figure 3-8. Button Shorted to Ground Button CY8CMBR2044 shorting Button Shorted to V If any button is found to be shorted to V , it is disabled.
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Page 21: Scan Rate/Sleep
CapSense Schematic Design If the value of C is found to be less than 1 nF or greater than 4 nF, all the buttons are disabled. Button C > 40 pF If the parasitic capacitance (C ) of any button is found to be more than 40 pF, that button is disabled. Figure 3-11.ExampleShowing CS), CS1 Passing the POST and CS2, CS3 Failing GPO0 (High) -
Page 22: Serial Debug Data Out
5-percent tolerance. If more than one CSx pin is pulled down, debug data is sent out only on one CSx pin. The priority is: CS0 > CS1 > CS2 > CS3 The Cypress Multi-Chart Tool can be used to view the data. The Serial Debug Data is sent by the device in the order according to Table 3-5. - Page 23 CapSense Schematic Design Table 3-5. Serial Data Output Sent by CY8CMBR2044 Byte Data Notes 0x0D Dummy data for multi chart 0x0A – 0x00 FW_Revision Firmware Revision – 0x00 CS0_Cp CS0 parasitic capacitance (pF) in Hex CS0_RawCount_MSB Unsigned 16-bit integer CS0_RawCount_LSB CS1_RawCount_MSB Unsigned 16-bit integer CS1_RawCount_LSB...
- Page 24 CapSense Schematic Design Byte Data Notes CS3_DiffCount_LSB Dummy data for MultiChart 0x00 0xFF 0xFF Table 3-6. Serial Debug Data Arranged in Multichart Raw Count Array Baseline Array Signal array 0x00 FW_Revision CS_Status GPO_Status 0x00 CS2_Cp 0x00 CS0_Cp 0x00 CS1_Cp 0x00 CS3_Cp CS0_RawCount CS0_Baseline...
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Page 25: Design Toolbox
CapSense Schematic Design Design Toolbox Design Toolbox helps you to design a CY8CMBR2044 CapSense solution. It offers basic information about the board layout and feature settings and recommends whether the design is fit for mass production. General Layout Guidelines The table below summarizes the layout guidelines for the CY8CMBR2044. These guidelines are discussed in Electrical and Mechanical Electrical and Mechanical Design Considerations of this guide. -
Page 26: Layout Estimator
CapSense Schematic Design Layout Estimator The Layout Estimator provides the minimum button size and maximum trace length recommendation based on the intended end-system requirements and industrial design. The inputs include the overlay material, overlay thickness, and trace capacitance of circuit board material. Refer to Figure 3-13, Table B, to learn the dielectric constants for different overlay materials and the trace capacitance per unit length for different PCBs. -
Page 27: C P , Power Consumption And Response Time Calculator
CapSense Schematic Design , Power Consumption and Response Time Calculator After the board layout has been completed, use this calculator to check the design before building the button board prototype. To verify the C value of each button, insert the button diameters and trace lengths into Table A. After you enter the information, the toolbox confirms whether each button is within the specified C range of 5 pF to 40 pF. -
Page 28: Design Validation
CapSense Schematic Design Design Validation After you have prototyped and tested the button board, use the Serial Debug Data Out test mode (Section 3.1.10 Serial Debug Data Out) to capture the raw count, baseline, difference count, and parasitic capacitance for all buttons. To enter this information into Table C of the sheet, follow these steps –... - Page 29 CapSense Schematic Design Button Scan Rate resistor value used in design Percentage of time a finger is on the buttons Outputs: Power consumption per button Design change recommendations. The Design Toolbox provides recommendations based on the actual values from the design if the button size or trace lengths are outside of best design practices. If the button board does not pass, the Design Toolbox will provide recommendations.
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Page 30: Electrical And Mechanical Design Considerations
4. Electrical and Mechanical Design Considerations When designing a capacitive touch sense technology into your application it is crucial to keep in mind that the CapSense device exists within a larger framework. Careful attention to every detail, including PCB layout, user interface, and end-user operating environment, leads to robust and reliable system performance. -
Page 31: Bonding Overlay To Pcb
Electrical and Mechanical Design Considerations Bonding Overlay to PCB Because the dielectric constant of air is very low, an air gap between the overlay and the button degrades the performance of the button. To eliminate the gap, use a nonconductive adhesive to bond the overlay to the CapSense PCB. -
Page 32: Electromagnetic Compatibility (Emc) Considerations
Electrical and Mechanical Design Considerations Electromagnetic Compatibility (EMC) Considerations Radiated Interference Radiated electrical energy can influence system measurements and potentially influence the operation of the processor core. The interference enters the CY8CMBR2044 chip at the PCB level, through CapSense button traces and any other digital or analog inputs. -
Page 33: Low-Power Design Considerations
5. Low-Power Design Considerations System Design Recommendations Cypress’s CY8CMBR2044 is designed to meet the low-power requirements of battery powered applications. To minimize power consumption, take these steps: Ground all unused CapSense inputs Minimize C using the design guidelines in Getting Started with CapSense, Section 3.7.1. -
Page 34: Scan Time (T )
Low-Power Design Considerations Response time, T is the amount of time the CY8CMBR2044 takes to produce a valid signal on GPOx after CSx RES, senses a TOUCH state. The CY8CMBR2044 device has two different response times. The first is the time it takes to respond when the device wakes up from low power mode: Equation 6 Where:... -
Page 35: Average Current In No Touch State (I )
Low-Power Design Considerations Average Current in NO TOUCH State (I AVE_NT Equation 8 Where: = Button Scan Rate = Scan time = current consumed by CY8CMBR2044 during low power sleep mode, from Table 5-2 SLEEP = current consumed by CY8CMBR2044 during active operation, from Table 5-2 ACTIVE Average Current in TOUCH State (I AVE_T... -
Page 36: Average Power (Pave )
Low-Power Design Considerations Average Power (P Equation 12 Where: = average current Example Calculation As an example of how to calculate average power, consider a CapSense user interface on a bluetooth headset with three well-designed buttons. The C for all three buttons is between 10 pF and 22 pF. The buttons are scanned at a rate of 507 ms. -
Page 37: Sleep Modes
Low-Power Design Considerations Sleep Modes Cypress’s CY8CMBR2044 can be configured to operate in either low-power sleep mode or deep sleep mode. Low-Power Sleep Mode When the CY8CMBR2044 device operates in low power sleep mode, the device draws 1 µA when not scanning the CS inputs. -
Page 38: Resources
Visit to access all of the reference material discussed in this section. Find a variety of technical resources at the CY8CMBR2044 web page. Datasheet The datasheet for the CapSense CY8CMBR2044 device is available at www.cypress.com. CY8CMBR2044 Design Toolbox The interactive Design Toolbox will enable you to design a robust and reliable CY8CMBR2044 CapSense solution. -
Page 39: Design Support
Resources Design Support To ensure the success of your CapSense solutions, Cypress has a variety of design support channels. –Browse technical articles by product family or perform a search on various Knowledge Based Articles CapSense topics. – a wide variety of application notes built on information presented in this CapSense Application Notes document. -
Page 40: Appendix
7. Appendix Schematic Example Schematic 1: Four Buttons with Four GPOs In the above schematic, the device is configured as: CS0 – CS3 pins: 560 Ω to CapSense buttons Four CapSense buttons (CS0 – CS3) AN66308 - CY8CMBR2044 CapSense® Design Guide, Doc. No. 001-66308 Rev. *F... - Page 41 Appendix GPO0 – GPO3 pins: LED and 560 Ω to VDD CapSense buttons driving four LEDs (GPO0 – GPO3) CMOD pin: 2.2 nF to Ground Modulator capacitor XRES pin: Floating For external reset Toggle/FSS pin: Ground Toggle ON/OFF disabled FSS disabled ...
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Page 42: Schematic 2: Three Buttons With Advanced Features Enabled
Appendix Schematic 2: Three Buttons with Advanced Features enabled In the above schematic, the device is configured as: CS0 – CS2 pins: 560 Ω to CapSense buttons; CS3 pin: Ground Three CapSense buttons (CS0 – CS2) CS3 not used in design ... -
Page 43: Acronyms
Appendix Delay pin: 4 kΩ to Ground LED ON Time of 1000 ms ScanRate/Sleep pin: 560 Ω to Master User configured scan rate = 30 ms Master to control device operating mode To enable Serial Debug Data output, connect a 5.6 kohm resistor on R11. Acronyms Acronym Description... -
Page 44: Glossary
® CapSense Cypress’s touch-sensing user interface solution. The industry’s No. 1 solution in sales by 4x over No. 2. CapSense Mechanical Button Replacement (MBR) Cypress’s configurable solution to upgrade mechanical buttons to capacitive buttons, requires minimal engineering effort to configure the sensor parameters and does not require firmware development. - Page 45 Glossary CapSense Sigma Delta (CSD) is a Cypress-patented method of performing self-capacitance (also called self-cap) measurements for capacitive sensing applications. In CSD mode, the sensing system measures the self-capacitance of an electrode, and a change in the self-capacitance is detected to identify the presence or absence of a finger.
- Page 46 Glossary While designing a PCB for capacitive sensing, a grounded copper plane should be placed surrounding the sensors for good noise immunity. But a solid ground increases the parasitic capacitance of the sensor which is not desired. Therefore, the ground should be filled in a special hatch pattern. A hatch pattern has closely-placed, crisscrossed lines looking like a mesh and the line width and the spacing between two lines determine the fill percentage.
- Page 47 Glossary Modulation IDAC is a programmable constant current source, whose output is controlled (ON/OFF) by the sigma-delta modulator output in a CSD block to maintain the AMUXBUS voltage at V . The average current supplied by this IDAC is equal to the average current drawn out by the sensor capacitor. Mutual-Capacitance Capacitance associated with an electrode (say TX) with respect to another electrode (say RX) is known as mutual capacitance.
- Page 48 Glossary Scan Time Time taken for completing the scan of a sensor. Self-Capacitance The capacitance associated with an electrode with respect to circuit ground. Sensitivity The change in Raw Count corresponding to the change in sensor capacitance, expressed in counts/pF. Sensitivity of a sensor is dependent on the board layout, overlay properties, sensing method, and tuning parameters.
- Page 49 Glossary The process of finding the optimum values for various hardware and software or threshold parameters required for CapSense operation. Programmable reference voltage block available inside PSoC used for CapSense and ADC operation. Widget A user-interface element in the CapSense component that consists of one sensor or a group of similar sensors.
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Page 50: Revision History
Revision History Document Revision History ® Document Title: AN66308 - CY8CMBR2044 CapSense Design Guide Document Number: 001-66308 Revision Issue Date Origin of Description of Change Change 12/30/2010 ANBA New Design Guide. 03/03/2011 ANBA Multiple chapter enhancements for content and reader clarity. 06/01/2012 UDYG Multiple chapter enhancements for content and reader clarity.
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