Counter/Timers; Table 5-10 Counter/Timer Registers - GE C2K Hardware Reference Manual

5.2.4 Counter/timers

The FPGA provides sixteen 32-bit configurable counter/timers, each with a resolution of 480ns.
Each counter/timer consists of a 32-bit current counter value, a 32-bit preset value, a maskable
interrupt, an enable bit, and a mode bit. The mode bit allows a specific instance to be either a
counter or a timer. In both cases, the preset value is loaded into the counter, and decremented
every 480ns. When the counter reaches zero, a maskable interrupt is generated and the preset
value is re-written into the current count value. Reading the counter interrupt status register clears
any active interrupts. If the instance is configured as a counter, the counter continues to loop -
indefinitely counting down to zero, reloading, and counting again. If the instance is configured as
a timer, the enable bit clears, and the counter no longer counts. Enabling an expired timer allows
the timer to recount from the preset value, since the value was re-loaded when the terminal count
was reached. The counters/timers share a common interrupt output, CNTR_TIMR_INT#.
Table 5-10 lists the counter/timer registers.
Counter/timer registers
Table 5-10
Offset Register
0x50 Counter Enable
0x52 Counter Disable
0x54 Counter Mode
0x56 Counter Interrupt Mask
0x58 Counter Interrupt Status
0x200... Counter Current Value (High/Low)
0x240... Counter Preload Value (High/Low)
Counter Enable Register
The Counter Enable Register enables counters 15–0.
Address offset: 0x50
Access: Read/write
Bits Field
15 CNTR15_EN
14 CNTR14_EN
13 CNTR13_EN
12 CNTR12_EN
11 CNTR11_EN
5-37
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Enables counters
Disables counters
Configures counter/timer as a counter or timer
Enables counter interrupt masking
Provides status information for each counter interrupt
Captures 32-bit counter current value
Captures 32-bit counter preload value
Default
0 Counter 15 Enable—enables counter 15.
0 = disable counter
1 = enable counter
0 Counter 14 Enable—enables counter 14.
0 = disable counter
1 = enable counter
0 Counter 13 Enable—enables counter 13.
0 = disable counter
1 = enable counter
0 Counter 12 Enable—enables counter 12.
0 = disable counter
1 = enable counter
0 Counter 11 Enable—enables counter 11.
0 = disable counter
1 = enable counter
Description
Description
Resources
C2K User's Guide