Watchdog Timer Initial Program - Asus AAEON BOXER-6615 User Manual

Fanless embedded box pc
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A.1 Watchdog Timer Initial Program
Table 1 : Watch dog relative IO address
Default Value
I/O Base
0xA10
Address
Table 2 : Watchdog relative register table
Register
Offset
Watchdog
WDTRST#
0x00
Enable
Pulse Width
0x05
Signal
0x05
Polarity
Counting
0x05
Unit
Output
0x05
Signal Type
Watchdog
0x05
Timer Enable
Timeout
0x05
Status
Timer
0x06
Counter
Appendix A – Watchdog Timer Programming
Note
I/O Base address for Watchdog operation.
This address is assigned by SIO LDN7, register 0x60-0x61.
BitNum
Value
7
1
0:1
01
2
0
3
0
4
1
5
1
6
1
Note
Enable/Disable
time out output via
WDTRST#
0: Disable
1: Enable
Width of Pulse signal
00: 1ms (do not use)
01: 25ms
10: 125ms
11: 5s
Pulse width is must
longer then 16ms.
0: low active
1: high active
Must set this bit to 0
Select time unit.
0: second
1: minute
0: Level
1: Pulse
Must set this bit to 1
0: Disable
1: Enable
1: timeout occurred.
Write a 1 to clear
timeout status
Time of watchdog timer
(0~255)
61

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