Related Manuals for Asus AAEON PICO-EHL1
Summary of Contents for Asus AAEON PICO-EHL1
- Page 1 PICO-EHL1 PICO-ITX Single Board Computer User’s Manual 2 Last Updated: July 31, 2023...
- Page 2 Copyright Notice This document is copyrighted, 2023. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
- Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows® is a registered trademark of Microsoft Corp. ⚫ Intel®, Atom®, and Celeron® are registered trademarks of Intel Corporation ⚫ ITE is a trademark of Integrated Technology Express, Inc. ⚫...
- Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity PICO-EHL1 ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
- Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page on AAEON.com for the latest version of this document.
- Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
- Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
- Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
- Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ 连接器及线材 O：表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ/T 11363-2006 标准规定的限量要求以下。 X：表示该有毒有害物质至少在该部件的某一均质材料中的含量超出...
- Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
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Page 11: Table Of Contents
Table of Contents Chapter 1 - Product Specifications..................1 Specifications........................ 2 Function Block Diagram ..................... 5 Chapter 2 – Hardware Information ..................6 Dimensions ........................7 Jumpers and Connectors ..................8 List of Jumpers ......................10 2.3.1 Clear CMOS Jumper & Auto Power Button Enable/Disable (JP1) ... 10 List of Connectors ...................... - Page 12 2.4.18 Power Input +12V (CN21) ................33 2.4.19 DC Jack Power Input (Reserved) (CN23) ............. 33 2.4.20 USB 2.0 Connector (CN24/CN25)..............34 2.4.21 Front Panel (CN26) ................... 35 Thermal Assembly Options ..................36 2.5.1 Active Cooling Fan FAN01/02 ................ 36 2.5.2 Fanless Heatspreader HSP01/02 ..............
- Page 13 3.5.1.1 Memory Configuration ................61 3.5.1.2 LVDS Panel Configuration ..............62 Setup Submenu: Security ..................64 3.6.1 Secure Boot ....................... 65 3.6.1.1 Key Management ..................66 Setup Submenu: Boot ....................68 3.7.1 BBS Priorities...................... 69 Setup Submenu: Save & Exit .................. 70 Chapter 4 –...
- Page 14 C.3.1.6 EapiWDogGetStatus() ................90 C.3.1.7 EapiWDogSetStatus() ................91 Preface...
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Page 15: Chapter 1 - Product Specifications
Chapter 1 Chapter 1 - Product Specifications... -
Page 16: Specifications
Specifications System Form Factor PICO-ITX Intel® Celeron® Processor J6412 (4C/4T, 2.0 GHz, 10W) Intel® Celeron® Processor N6210 (2C/2T, 1.2 GHz, 6.5W) Intel Atom® x6425E (4C/4T, 2.0 GHz, 12W) Intel Atom® x6211E (2C/2T, 1.3 GHz, 6W) Chipset Integrated with Intel® SoC Memory Type DDR4 3200MHz SODIMM x 1, up to 32GB BIOS... - Page 17 Display Controller Intel® UHD Graphics for 10th Gen Intel® Processors LVDS/eDP LVDS x 1 (2CH 18/24-bit) 1920 x 1200 @60Hz eDP 1.3 x 1, 3840 x 2160 @60Hz (Optional) Display Interface HDMI 1.4 x 1, 3480 x 2160 @30Hz Multiple Display Up to 2 Simultaneous Displays Audio Codec...
- Page 18 Internal I/O 4-pin Smart Fan x 1 — Front Panel HDD LED, PWR LED, Power Button, Buzzer, Reset Expansion Mini PCIe/mSATA Full-Size mSATA/mPCIe x 1 (Default: mSATA, select with BIOS) M.2 2242 B-Key x 1 (PCIe 3.0 [x2] as default, USB 2.0 is optional) Others BIO x 1 (Optional, supports PCIe [x2], Line-Out, DDI, GPIO,...
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Page 19: Function Block Diagram
Function Block Diagram Chapter 1 – Product Specifications... -
Page 20: Chapter 2 - Hardware Information
Chapter 2 Chapter 2 – Hardware Information... -
Page 21: Dimensions
Dimensions Chapter 2 – Hardware Information... -
Page 22: Jumpers And Connectors
Jumpers and Connectors Component Side: Chapter 2 – Hardware Information... - Page 23 Solder Side: Chapter 2 – Hardware Information...
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Page 24: List Of Jumpers
List of Jumpers Jumpers allow users to manually customize system configurations to their suitable application needs. Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Clear CMOS Jumper & Auto Power Button Enable/Disable 2.3.1 Clear CMOS Jumper &... -
Page 25: List Of Connectors
List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function RTC Battery Connector LVDS Back Light Inverter LVDS/eDP [Reserved] HDMI Audio RJ-45 M.2 2242 B-Key CN10 SATA CN11 SATA Power... -
Page 26: Rtc Battery Connector (Cn1)
2.4.1 RTC Battery Connector (CN1) Pin Name Signal Type Signal Level +3.3V +3.3V 2.4.2 LVDS Back Light Inverter (CN2) Pin Name Signal Type Signal Level BLK_PWR +12V (Default) / +5V BLK_PWR +12V (Default) / +5V BKL_CONTROL Signal BKL_ENABLE Signal Chapter 2 – Hardware Information... -
Page 27: Lvds/Edp [Reserved] (Cn3)
Note 1: Backlight Power can be 12V or 5V, set by BOM: Stuff R285 for 12V and stuff R287 for 5V. (Default: 12V) Note 2: CN2 max current 2A. 2.4.3 LVDS/eDP [Reserved] (CN3) Pin Name Signal Type Signal Level LVD1_CB_3_DP DIFF LVD1_CB_3_DN DIFF... - Page 28 Pin Name Signal Type Signal Level LVD1_DDC_CLK/DDI0_HPD Signal LVD1_BKLTEN/DDI0_BKLTEN Signal LVD1_DDC_DATA Signal LVD1_BKLCTL/DDI0_BKLTCTL Signal LVD1_CA_CLKP/ DDI0_AUX_DP DIFF LVD1_CA_CLKN/DDI0_AUX_DN DIFF LVD1_CA_3_DP/DDI0_LANE3_DP DIFF LVD1_CA_3_DN/DDI0_LANE3_DN DIFF LVD1_CA_0_DP/DDI0_LANE0_DP DIFF LVD1_CA_0_DN/DDI0_LANE0_DN DIFF LVD1_CA_1_DP/DDI0_LANE1_DP DIFF LVD1_CA_1_DN/DDI0_LANE1_DN DIFF LVD1_CA_2_DP/DDI0_LANE2_DP DIFF LVD1_CA_2_DN/DDI0_LANE2_DN DIFF +VDD +3.3V +VDD +3.3V +VDD +3.3V Note: CN3: VDD power current max: 1.5A.
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Page 29: Hdmi (Cn4)
2.4.4 HDMI (CN4) Pin Name Signal Type Signal Level HDMI_TX2+ DIFF HDMI_TX2- DIFF HDMI_TX1+ DIFF HDMI_TX1- DIFF HDMI_TX0+ DIFF HDMI_TX0- DIFF HDMI_CLK+ DIFF HDMI_CLK- DIFF DDC_CLK Signal DDC_DATA Signal HDMI_HPD Chapter 2 – Hardware Information... -
Page 30: Audio (Cn5)
2.4.5 Audio (CN5) Pin Name Signal Type Signal Level LOUT_R Signal MIC_R Signal LOUT_L Signal MIC_L Signal JD_LOUT Signal JD_MIC Signal AUD_GND AUD_GND JD_LIN Signal LIN_R Signal +V5A_AUD LIN_L Signal AUD_GND AUD_GND Chapter 2 – Hardware Information... -
Page 31: Cn8)
2.4.6 RJ-45 (CN8) Pin Name Signal Type Signal Level LAN1_MDI0+ DIFF LAN1_MDI0- DIFF LAN1_MDI1+ DIFF LAN1_MDI1- DIFF LAN1_CT LAN1_CT LAN1_MDI2+ DIFF LAN1_MDI2- DIFF LAN1_MDI3+ DIFF LAN1_MDI3- DIFF +V3P3A +3.3V LAN2_LED_100# Signal LAN2_LED_1000# Signal Chapter 2 – Hardware Information... -
Page 32: 2242 B-Key (Cn9)
2.4.7 M.2 2242 B-Key (CN9) Pin Name Signal Type Signal Level +V3P3A 3.3V +V3P3A 3.3V FULL_CARD_PWR_OFF USB2_4_DP DIFF W_DISABLE2# Signal USB2_4_DN FIFF SSD_LED# Signal Chapter 2 – Hardware Information... - Page 33 Pin Name Signal Type Signal Level PCIE_5_RXN DIFF PCIE_5_RXP DIFF PCIE_5_TXP DIFF PCIE_5_TXN DIFF PCIE_4_RXP DIFF PCIE_4_RXN PCIE_4_TXN DIFF PCIE_4_TXP DIFF BUF_PLT_RST# Signal PCIE_CLKREQ#0 Signal PCIE_0_CLK_DN DIFF Chapter 2 – Hardware Information...
- Page 34 Pin Name Signal Type Signal Level PCIE_WAKE# Signal PCIE_0_CLK_DP DIFF +V3P3A_2242 3.3V +V3P3A_2242 3.3V +V3P3A_2242 3.3V Chapter 2 – Hardware Information...
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Page 35: Sata (Cn10)
2.4.8 SATA (CN10) Pin Name Signal Type SATA_1_TXP DIFF SATA_1_TXN DIFF SATA_1_RXN DIFF SATA_1_RXP DIFF 2.4.9 SATA Power (CN11) Pin Name Signal Type Signal Level +V5S Note: SATA power current max: 1.5A. Chapter 2 – Hardware Information... -
Page 36: 4-Bit Dio Header (Cn12)
2.4.10 4-bit DIO Header (CN12) Pin Name Signal Type Signal Level +V5S DIO_0 Signal DIO_1 Signal DIO_2 Signal DIO_3 Signal Note: DIO power current max: 0.5A. Chapter 2 – Hardware Information... -
Page 37: Usb 3.2 Connector (Supports 2 Ports) (Cn13)
2.4.11 USB 3.2 Connector (Supports 2 Ports) (CN13) Pin Name Signal Type Signal Level +V5A_USB12 USB2_0_DN DIFF USB2_0_DP DIFF USB3_0_RXN DIFF USB3_0_RXP DIFF USB3_0_TXN DIFF USB3_0_TXP DIFF +V5A_USB12 USB2_1_DN DIFF USB2_1_DP DIFF USB3_1_RXN DIFF USB3_1_RXP DIFF Chapter 2 – Hardware Information... -
Page 38: Msata/Mini Card (Cn15)
Pin Name Signal Type Signal Level USB3_1_TXN DIFF USB3_1_TXP DIFF 2.4.12 mSATA/Mini Card (CN15) Pin Name Signal Type Signal Level PCIE_WAKE# Signal +3.3V +3.3V +1.5V +1.5V PCIE_CLK_REQ# Signal PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF Chapter 2 – Hardware Information... - Page 39 Pin Name Signal Type Signal Level W_DISABLE# Signal +3.3V PCIE_RST# Signal +3.3V PCIE_RX-/SATA_RX+ DIFF +3.3V +3.3V PCIE_RX+/SATA_RX- DIFF +1.5V +1.5V SMB_CLK Signal +3.3V PCIE_TX-/SATA_TX- DIFF SMB_DATA Signal +3.3V PCIE_TX+/SATA_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3V +3.3V +3.3V +3.3V Chapter 2 – Hardware Information...
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Page 40: Bio (Cn16)
Pin Name Signal Type Signal Level +1.5V +1.5V +3.3V +3.3V 2.4.13 BIO (CN16) Pin Name Signal Type Signal Level +V12A +12V PCIE_0_TXN DIFF PCIE_0_RXN DIFF PCIE_0_TXP DIFF PCIE_0_RXP DIFF PCIE_1_TXN DIFF PCIE_1_RXN DIFF PCIE_1_TXP DIFF Chapter 2 – Hardware Information... - Page 41 Pin Name Signal Type Signal Level PCIE_1_RXP DIFF PS_ON# Signal DDI1_CTRL_CLK DDI1_CTRL_DATA +V5A +V5A +V5A +V5A PCIE_1_CLK_DP DIFF BUF_PLT_RST# Signal PCIE_1_CLK_DN DIFF DDI1_LANE1_DN DIFF DDI1_LANE0_DN DIFF DDI1_LANE1_DP DIFF DDI1_LANE0_DP DIFF DDI1_LANE3_DN DIFF DDI1_LANE2_DN DIFF DDI1_LANE3_DP DIFF DDI1_LANE2_DP DIFF Chapter 2 – Hardware Information...
- Page 42 Pin Name Signal Type Signal Level DDI1_HPD_BIO Signal DDI1_AUXN DIFF DDI1_AUXP DIFF USB3_2_TXN DIFF USB3_2_TXP DIFF USB2_6_DN DIFF USB2_6_DP DIFF USB3_2_RXN DIFF USB3_2_RXP DIFF SMB_CLK SMB_DATA PCIE_WAKE# Signal USB2_OC2# Signal USB 2.0_OC# Signal LPC_AD0 Signal LPC_FRAME# Signal Chapter 2 – Hardware Information...
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Page 43: Dual Com Port Header (Cn17)
Pin Name Signal Type Signal Level LPC_AD1 Signal SERIRQ# Signal LPC_AD2 Signal LPC_AD3 Signal GPIO Signal Audio_GND LPC_CLK Signal Audio_OUT_L Signal PME# Signal Audio_OUT_R Signal 2.4.14 Dual COM Port Header (CN17) Pin Name_RS232 Pin Name_RS422 Pin Name_RS485 DCD_1 TX_1- DATA_1- DCD_2 TX_2- DATA_2-... - Page 44 Pin Name_RS232 Pin Name_RS422 Pin Name_RS485 RX_2 TX_2+ DATA_2+ TX_1 RX_1+ TX_2 RX_2+ DTR_1 RX_1- DTR_2 RX_2- DSR_1 DSR_2 RTS_1 RTS_2 CTS_1 CTS_2 RI_1/12V/5V RI_2/12V/5V UART_TX UART_RX Note 1: COM RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note 2: RI1/+5V/+12V function can be set by BOM(R423-RI/R369-+12V/R370-+5V).
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Page 45: Spi Port (Cn18)
2.4.15 SPI Port (CN18) Pin Name Signal Type Signal Level SPI_SO Signal SPI_CLK Signal +V3P3A_SPI 3.3A SPI_SI Signal SPI_CS Signal 2.4.16 eSPI (Debug Card)/SMBus/I2C (CN19) Pin Name Signal Type Signal Level ESPI_IO0 Signal +1.8V ESPI_IO1 Signal +1.8V ESPI_IO2 Signal +1.8V ESPI_IO3 Signal +1.8V... -
Page 46: 4-Pin Smart Fan Connector (Cn20)
Pin Name Signal Type Signal Level +V3.3S +3.3V ESPI_CS Signal ESPI_RESET# Signal +1.8V ESPI_CLK Signal 1.8V SMB_DATA/ I2C_SDA Signal +3.3V SMB_CLK/ I2C_CLK Signal +3.3V SMB_ALERT/INT_SERIRQ Signal +3.3V 2.4.17 4-pin Smart Fan Connector (CN20) Pin Name Signal Type Signal Level +V12S +12V FAN_TAC Signal... -
Page 47: Power Input +12V (Cn21)
2.4.18 Power Input +12V (CN21) Pin Name Signal Type Signal Level +V_IN +12V 2.4.19 DC Jack Power Input (Reserved) (CN23) Pin Name Signal Type Signal Level +V_IN +12V Chapter 2 – Hardware Information... -
Page 48: Usb 2.0 Connector (Cn24/Cn25)
2.4.20 USB 2.0 Connector (CN24/CN25) Pin Name Signal Type Signal Level +V5A USB2_DN DIFF USB2_DP DIFF Note: Each connector power current max: 0.5A. Chapter 2 – Hardware Information... -
Page 49: Front Panel (Cn26)
2.4.21 Front Panel (CN26) Pin Name Signal Type Signal Level EXT_PWRBTN# Signal FP_IDELED# Signal +V3P3S +3.3V FP_BUZZER Signal +V5S +V3P3S +3.3V HWRST# Signal Chapter 2 – Hardware Information... -
Page 50: Thermal Assembly Options
Thermal Assembly Options 2.5.1 Active Cooling Fan FAN01/02 Active Cooling Fan, Part Number: PICO-EHL1-FAN01/02 SVREW S:M 3x5L (PICO-EHL1-FAN01/02 ACCESSORIES) PICO-EHL1-FAN01/02 COPPER STUD,M 3x10+6m m (PICO-EHL1-FAN01/02 ACCESSORIES) PICO-EHL1 COPPER STUD:M 3x20L (Double Internal Thread) CHASSIS SCREW S:M 3x4L,FLAT-HEAD (parts are subject to custom er's assem bly m ethod) Chapter 2 –... -
Page 51: Fanless Heatspreader Hsp01/02
2.5.2 Fanless Heatspreader HSP01/02 Heat spreader/fanless assembly, Part Number: PICO-EHL1-HSP01/02 SCREW S,M 3x5L (PICO-EHL1-HSP01/02 ACCESSORIES) PICO-EHL1 COPPER STUD,M 3x10+6m m (PICO-EHL1-HSP01/02 ACCESSORIES) PICO-EHL1-HSP01/02 M 3 INTERNAL THREAD CHASSIS(END USER) Before installing heat spreader please apply therm al grease at this area. Chapter 2 –... -
Page 52: Chapter 3 - Ami Bios Setup
Chapter 3 Chapter 3 - AMI BIOS Setup... -
Page 53: System Test And Initialization
System Test and Initialization These routines test and initialize board hardware. If the routines encounter an error during the tests, you will either hear a few short beeps or see an error message on the screen. There are two kinds of errors: fatal and non-fatal. The system can usually continue the boot up sequence with non-fatal errors. -
Page 54: Ami Bios Setup
AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off. Entering Setup Power on the computer and press <Del>or <ESC>... -
Page 55: Setup Submenu: Main
Setup Submenu: Main Chapter 3 – AMI BIOS Setup... -
Page 56: Setup Submenu: Advanced
Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup... -
Page 57: Cpu Configuration
3.4.1 CPU Configuration Options Summary Active Processor Cores Optimal Default, Failsafe Default Number of cores to enable in each processor package. Intel (VMX) Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. -
Page 58: Pch-Fw Configuration
3.4.2 PCH-FW Configuration Chapter 3 – AMI BIOS Setup... -
Page 59: Firmware Update Configuration
3.4.2.1 Firmware Update Configuration Options Summary Me FW Image Re-Flash Enabled Disabled Optimal Default, Failsafe Default Enable/Disable Me FW Image Re-Flash function. FW Update Disabled Enabled Optimal Default, Failsafe Default Enable/Disable ME FW Update function. Chapter 3 – AMI BIOS Setup... -
Page 60: Ptt Configuration
3.4.3 PTT Configuration Options Summary TPM Device Selection dTPM Optimal Default, Failsafe Default Selects TPM device: PTT or discrete TPM. PTT - enables PTT in SkuMgr dTPM - disables PTT in SkuMgr Warning! PTT/dTPM will be disabled and all data saved on it will be lost. -
Page 61: Trusted Computing
3.4.4 Trusted Computing Options Summary Security Device Support Enable Optimal Default, Failsafe Default Disable Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. SHA-1 PCR Bank Disabled Optimal Default, Failsafe Default Enabled... - Page 62 Options Summary Pending operation None Optimal Default, Failsafe Default TPM Clear Schedule an Operation for the Security Device. NOTE: Your Computer will reboot during restart in order to change State of Security Device. Platform Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Platform Hierarchy.
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Page 63: Sata Configuration
3.4.5 SATA Configuration Options Summary SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable/Disable SATA Device. Port* Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Port. Chapter 3 – AMI BIOS Setup... -
Page 64: Hardware Monitor
3.4.6 Hardware Monitor Options Summary Smart Fan Disabled Enabled Optimal Default, Failsafe Default Enables or Disables Smart Fan. Chapter 3 – AMI BIOS Setup... -
Page 65: Smart Fan Mode Configuration
3.4.6.1 Smart Fan Mode Configuration Options Summary Fan1 Output Mode Output PWM mode (open drain) Linear Fan Application Output PWM mode Optimal Default, Failsafe Default (push pull) Fan1 Smart Fan control Manual Duty Mode Auto Duty-Cycle Mode Optimal Default, Failsafe Default Smart Fan Mode select. -
Page 66: Sio Configuration
3.4.7 SIO Configuration Chapter 3 – AMI BIOS Setup... -
Page 67: Serial Port Configuration
3.4.7.1 Serial Port Configuration Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=4 IO=2F8h; IRQ=3 Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts. -
Page 68: Serial Port Console Redirection
3.4.7.2 Serial Port Console Redirection Options Summary Console Redirection Disabled Enabled Optimal Default, Failsafe Default Console Redirection Enable or Disable. Console Redirection EMS Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Chapter 3 – AMI BIOS Setup... -
Page 69: Aaeon Bios Robot
3.4.8 AAEON BIOS Robot Options Summary Sends watch dog before Disabled Optimal Default, Failsafe Default BIOS POST Enabled Enabled - Robot set Watch Dog Timer (WDT) right after power on, before BIOS start POST process. And then Robot will clear WDT on completion of POST. WDT will reset system automatically if it is not cleared before its timer counts down to zero. - Page 70 Options Summary Delayed POST (PEI phase) Disabled Optimal Default, Failsafe Default Enabled Enabled - Robot holds BIOS from starting POST, right after power on. This allows BIOS POST to start with stable power or start after system is physically warmed-up. Note: Robot does this before 'Sends watch dog'.
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Page 71: Power Management
3.4.9 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. Restore AC Power Loss Last State Optimal Default, Failsafe Default Always On Always Off Select power state when power is re-applied after a power failure. RTC wake system from S5 Disabled Optimal Default, Failsafe Default... -
Page 72: Digital Io Port Configuration
3.4.10 Digital IO Port Configuration Options Summary DIO Port* Output Input Set DIO as Input or Output. Output Level High Set output level when DIO pin is output. Chapter 3 – AMI BIOS Setup... -
Page 73: Setup Submenu: Chipset
Setup Submenu: Chipset Chapter 3 – AMI BIOS Setup... -
Page 74: System Agent (Sa) Configuration
3.5.1 System Agent (SA) Configuration Options Summary VT-d Disabled Enabled Optimal Default, Failsafe Default VT-d capability. Chapter 3 – AMI BIOS Setup... -
Page 75: Memory Configuration
3.5.1.1 Memory Configuration Chapter 3 – AMI BIOS Setup... -
Page 76: Lvds Panel Configuration
3.5.1.2 LVDS Panel Configuration Options Summary LVDS Disabled Enabled Optimal Default, Failsafe Default Enable/Disable this panel. LVDS Panel Type 640x480,18bit,60Hz 800x480,18bit,60Hz 800x600,18bit,60Hz 1024x600,18bit,60Hz 1024x768,18bit,60Hz 1024x768,24bit,60Hz Optimal Default, Failsafe Default 1280x768,24bit,60Hz 1280x1024,48bit,60Hz 1366x768,24bit,60Hz 1440x900,48bit,60Hz 1600x1200,48bit,60Hz 1920x1080,48bit,60Hz 1920x1200,48bit,60Hz Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item. - Page 77 Options Summary Panel Mode Single Channel Optimal Default, Failsafe Default Dual Channel Panel mode selection for Single channel or Dual channel. Color Depth 18-bit Optimal Default, Failsafe Default 24-bit 36-bit 48-bit Select panel type. Backlight Mode BIOS & Application Windows Slider Optimal Default, Failsafe Default Select backlight control signal type.
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Page 78: Setup Submenu: Security
Setup Submenu: Security Change User/Supervisor Password You can install a Supervisor password, and if you install a supervisor password, you can then install a user password. A user password does not provide access to many of the features in the Setup utility. If you highlight these items and press Enter, a dialog box appears which lets you enter a password. -
Page 79: Secure Boot
3.6.1 Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset. Secure Boot Mode Custom Optimal Default, Failsafe Default... -
Page 80: Key Management
3.6.1.1 Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset. Restore Factory Keys Force System to User Mode. - Page 81 Options Summary Restore DB defaults Restore DB variable to factory defaults. Platform Key (PK) Details Export Update Delete Key Exchange Keys Details Export Update Append Delete Authorized Signatures Details Export Update Append Delete Forbidden Signatures Details Export Update Append Delete Authorized TimeStamps Update Append...
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Page 82: Setup Submenu: Boot
Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Quiet Boot option. UEFI PXE Support Disabled Optimal Default, Failsafe Default Enabled Enable/Disable UEFI Network Stack. FIXED BOOT ORDER Priorities Sets the system boot order. Chapter 3 –... -
Page 83: Bbs Priorities
3.7.1 BBS Priorities Chapter 3 – AMI BIOS Setup... -
Page 84: Setup Submenu: Save & Exit
Setup Submenu: Save & Exit Options Summary Save Changes and Reset Reset the system after saving the changes. Discard Changes and Exit Exit system setup without saving any changes. Restore Defaults Restore/Load Default values for all the setup options. Chapter 3 – AMI BIOS Setup... -
Page 85: Chapter 4 - Drivers Installation
Chapter 4 Chapter 4 – Drivers Installation... -
Page 86: Drivers Download And Installation
Drivers Download and Installation Drivers for the PICO-EHL1 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/pico-itx-board-pico-ehl1 Download the driver(s) you need and follow the steps below to install them. Install Chipset Driver Open the Intel Chipset folder. - Page 87 Install ME Driver Open the ME folder. Run the SetupME.exe file Follow the instructions Driver will be installed automatically Install Serial IO Driver Open the Serial IO folder. Follow the instructions in the .inf files to manually install drivers. Install Intel® PSE Drivers (Optional) Open the Intel®...
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Page 88: Appendix A - Mating Connectors
Appendix A Appendix A – Mating Connectors... -
Page 89: List Of Mating Connectors And Cables
List of Mating Connectors and Cables The following table lists mating connectors and available cables. Conn Mating Connector AAEON Function Available Cable Label Cable P/N Vendor Model No. 175011301C RTC Battery Molex 51021-0200 Battery Cable 170X000152 LVDS Back Light SHR-06V-S-B LVDS Inverter Inverter Cable... -
Page 90: Appendix B - I/O Information
Appendix B Appendix B - I/O Information... -
Page 91: Direct Memory Access (Dma) Map
Direct Memory Access (DMA) Map Appendix B – I/O Information... -
Page 92: I/O Address Map
I/O Address Map Appendix B – I/O Information... - Page 93 Appendix B – I/O Information...
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Page 94: Irq Mapping Chart
IRQ Mapping Chart Appendix B – I/O Information... - Page 95 Appendix B – I/O Information...
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Page 96: Large Memory Map
Large Memory Map Memory Address Map Appendix B – I/O Information... -
Page 97: Appendix C - Watchdog Timer Programming
Appendix C Appendix C - Watchdog Timer Programming... -
Page 98: Introduction To Watchdog Timer
Introduction to Watchdog Timer This section details how to set up and program the Watchdog Timer for your AAEON system or board. The watchdog timer is used to automatically detect malfunctions and recover the system. During normal operation, the system will regularly send a signal to reset the watchdog timer. -
Page 99: C.2 Programing The Watchdog Timer With Aaeon Sdk
C.2 Programing the Watchdog Timer with AAEON SDK If you have installed the AAEON Framework, you can program the Watchdog Timer using the AAEON SDK. Simply locate where the SDK is installed, and double click the icon. The following dialog box will appear: Count Mode: Set Watchdog Timer to count in minutes or seconds. -
Page 100: C.3 Programing Watchdog Timer With Aaeon Windows Eapi
C.3 Programing Watchdog Timer with AAEON Windows EAPI AAEON Framework (KMDF Driver) must be installed before calling these functions. EapiLibInitialize() should be the first to call before calling other EAPI functions. EApiLibUnInitialize() should be called to release resources before program exit. -
Page 101: Watchdog Timer Functions
EApiWDogStop must be called before Stage C/F to prevent event from being generated. EApiWDogStop must be called before Stage D/G to prevent system from being reset. C.3.1 Watchdog Timer Functions C.3.1.1 EapiWDogGetCap() Command Line: EApiWDogGetCap(…) __OUTOPT uint32_t *pMaxDelay, __OUTOPT uint32_t *pMaxEventTimeout, __OUTOPT uint32_t *pMaxResetTimeout Use this command to get maximum Supported Delay / Supported Event Timeout / Supported Reset Timeout of the watchdog timer. -
Page 102: Eapiwdogstart()
C.3.1.2 EapiWDogStart() Command Line: EApiWDogStart( __IN uint32_t Delay, __IN uint32_t Minute, __IN uint32_t EventTimeout, __IN uint32_t ResetTimeout Use this command to start the Watchdog Timer and set the timeout values. To stop the Watchdog Timer, issue the command EApiWDogStop. After issuing EAPiWDogStop, the command EApiWDogStart must be called again with new values to restart. -
Page 103: Eapiwdogtrigger()
C.3.1.3 EapiWDogTrigger() Command Line: EapiWDogTrigger() Use this command to trigger the Watchdog Timer. Parameters Function Parameters None Condition Return Values Library Uninitialized EAPI_STATUS_NOT_INITIALIZED Watchdog Not Started EAPI_STATUS_ERROR Common Error Common Error Code Others EAPI_STATUS_SUCCESS C.3.1.4 EapiWDogStop() Command Line: EapiWDogStop() Use this command to close the Watchdog Instance. This will disable the Watchdog Timer and clear previous settings. -
Page 104: Eapiwdogreloadtimer()
C.3.1.5 EapiWDogReloadTimer() Command Line: EapiWDogReloadTimer() Use this command to reload the Timeout count Parameters Function Parameters None Condition Return Values Library Uninitialized EAPI_STATUS_NOT_INITIALIZED Common Error Common Error Code Others EAPI_STATUS_SUCCESS C.3.1.6 EapiWDogGetStatus() Command Line: EapiWDogGetStatus( __OUTOPT uint32_t *pwdtMinute, __OUTOPT uint32_t *pwdtCountTime, __OUTOPT uint32_t *pwdtReloadTime Use this command to get the Watchdog Timer mode, time count value and reload timer. - Page 105 C.3.1.7 EapiWDogSetStatus() Command Line: EApiWDogSetStatus( __IN uint32_t wdtMinute, __IN uint32_t wdtCountTime, __IN uint32_t wdtReloadTime Use this command to set Watchdog Timer mode, time count value and reload timer. Parameters Function Parameters wdtMinute Set the mode of minute or second wdtCountTime Set WDT time count wdtReloadTime Set WDT ReloadTime...