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Asus Aaeon BOXER-8331AI User Manual

Embedded ai vision system
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BOXER-8331AI
Embedded AI Vision System
User's Manual 1
Ed
st
Last Updated: October 22, 2019

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  Summary of Contents for Asus Aaeon BOXER-8331AI

  • Page 1 BOXER-8331AI Embedded AI Vision System User’s Manual 1 Last Updated: October 22, 2019...
  • Page 2 Copyright Notice This document is copyrighted, 2019. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows® is a registered trademark of Microsoft Corp. ⚫ Intel®, Core®, and Xeon® are registered trademarks of Intel Corporation ⚫ NVIDIA®, GeForce®, and GeForce RTX are registered trademarks of NVIDIA ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity BOXER-8331AI NVIDIA GeForce RTX-2060S or RTX-2080 Ti Graphics Card Wallmount bracket 3-pin DC in Power Connector Screw Package Thermal Pad Package If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the BOXER-8331AI product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation. Caution: There is a danger of explosion if the battery is incorrectly replaced.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON System QO4-381 Rev.A0 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯 醚(PBDE) (Pb) (Hg) (Cd) (Cr(VI)) (PBB) 印刷电路板 × ○ ○ ○ ○ ○ 及其电子组件 外部信号 × ○ ○ ○ ○ ○ 连接器及线材 ○ ○...
  • Page 10 China RoHS Requirement (EN) Hazardous and Toxic Materials List AAEON System QO4-381 Rev.A0 Hazardous or Toxic Materials or Elements Component Name PCB and Components Wires & Connectors for Ext.Connections Chassis CPU & RAM HDD Drive LCD Module Optical Drive Touch Control Module Battery This form is prepared in compliance with the provisions of SJ/T 11364.
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ....................1 Specifications ....................... 2 SKU List ......................... 5 Chapter 2 – Hardware Information .....................6 Dimensions ........................7 2.1.1 I/O Location ....................9 Jumpers and Connectors ..................10 List of Jumpers ......................12 2.3.1 Auto Power Button Enable/Disable Selection (JP1) ......
  • Page 12 2.4.15 PWR LED/HDD LED ..................27 CPU Installation ....................... 28 DDR4 Memory Module Installation ..............29 2.5” SATA Drive Installation ..................31 Graphics Card Installation ..................33 Chapter 3 - AMI BIOS Setup ..................... 39 System Test and Initialization ................40 AMI BIOS Setup ......................
  • Page 13 Setup submenu: Security ..................67 Setup submenu: Boot .................... 68 3.7.1 Boot: BBS Priorities ..................69 Setup submenu: Save & Exit ................70 Chapter 4 – Drivers Installation ....................71 Drivers Installation ....................72 Appendix A - Watchdog Timer Programming ..............75 Watchdog Timer Initial Program .................
  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 15: Specifications

    Specifications System 6th / 7th Gen Intel® Core™ desktop and Xeon® server grade processors -Intel® Core™ i7-6700TE, 2.4 GHz -Intel® Core™ i5-6500TE, 2.3 GHz -Intel® Core™ i3-6100TE, 2.7 GHz -Intel® Core™ i7-7700T, 2.9 GHz -Intel® Core™ i7-7700, 3.6 Ghz -Intel® Core™ i3-7101TE, 3.4 GHz -Intel®...
  • Page 16 System Expansion Full-size Mini card x2 (USB/PCIe, w/ 1 SIM slot) (A1) 1 x PCIe[x16], Built in NVIDIA RTX-2060 Super (A1) Built in NVIDIA RTX-2080 Ti (A2) Graphics card size limit: 114.55mm(H) x 350mm (L) Indicator Power LED x1, HDD active LED x1 OS Support Gen Intel®...
  • Page 17 Mechanical Mounting Wallmount Dimensions (W x H x D) 6.10” x 7.87” x 15.75” (155mm x 200mm x 400mm) Gross Weight 18.29 lbs. (8.3 kg) Net Weight 14.53 lbs. (7 kg) Environmental 0°C ~ 40°C according to IEC60068-2 with 0.5 m/s Operating Temperature airflow -4°F ~ 176°F (-40°C ~ 80°C)
  • Page 18: Sku List

    SKU List PCIe PCIe PCIe Expansion Chasis (x16) (x8) (x1) Supported 4USB3, BOXER-8331AI-A1 C236 L/Fan Graphics 180W 5LAN, 1COM, Graphics 2HDMI BOXER-8331AI-A2 C236 L/Fan 250W DC12-24V Chasis Key L/Fan – Long Fan System Chapter 1 – Product Specifications...
  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 20: Dimensions

    Dimensions BOXER-8331AI-A1/A2 Chapter 2 – Hardware Information...
  • Page 21 Chapter 2 – Hardware Information...
  • Page 22: I/O Location

    2.1.1 I/O Location BOXER-8331AI-A1/A2 Chapter 2 – Hardware Information...
  • Page 23: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 24 Solder Side Chapter 2 – Hardware Information...
  • Page 25: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the system’s jumpers that you can configure for your application. Label Function Auto Power Button Enable/Disable Selection COM1 pin 9 function select Clear CMOS Jumper PEG Lanes CFG6 selection PEG Lanes CFG5 selection 2.3.1 Auto Power Button Enable/Disable Selection (JP1)
  • Page 26: Peg Lanes Cfg6 / Cfg5 Selection (Jp8 / Jp9)

    2.3.3 PEG Lanes CFG6 / CFG5 Selection (JP8 / JP9) For PCI Express [x16] 1 2 3 (JP8 1-2) (JP9 1-2) Note: PCIe[x16] slot jumper for use with one [x16] riser card. Chapter 2 – Hardware Information...
  • Page 27: List Of Connectors

    List of Connectors Please refer to the table below for all of the system’s connectors that you can configure for your application Label Function HDMI1 HDMI Connector (Only for Debug Mode) HDMI2 HDMI Connector (Only for Debug Mode) USB3.0 Port 1~4 USB 3.0 port LAN Port 1~5 RJ45 10/100/1000Bps LAN connector...
  • Page 28: Hdmi Port

    2.4.1 HDMI Port Pin name Signal Type Signal Level HDMI_DATA2_P HDMI_DATA2_N HDMI_DATA1_P HDMI_DATA1_N HDMI_DATA0_P HDMI_DATA0_N HDMI_CLK_P DIFF HDMI_CLK_N DIFF HDMI_SCL HDMI_SDA HDMI_PWR HDMI_HDP Chapter 2 – Hardware Information...
  • Page 29: Dual Usb 3.0

    2.4.2 Dual USB 3.0 Pin name Signal Type Signal Level +5VSB DIFF USB0_D- DIFF USB0_D+ USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB DIFF USB1_D- DIFF USB1_D+ USB1_SSRX− DIFF USB1_SSRX+ DIFF USB1_SSTX− DIFF USB1_SSTX+ DIFF Chapter 2 – Hardware Information...
  • Page 30: Lan (Rj-45) And Dual Usb 3.0

    2.4.3 LAN (RJ-45) and Dual USB 3.0 LAN (RJ-45) Pin name Signal Type Signal Level DIFF MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- Chapter 2 – Hardware Information...
  • Page 31 Dual USB 3.0 Pin name Signal Type Signal Level +5VSB DIFF USB0_D- DIFF USB0_D+ USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB DIFF USB1_D- DIFF USB1_D+ USB1_SSRX− DIFF USB1_SSRX+ DIFF USB1_SSTX− DIFF USB1_SSTX+ DIFF Chapter 2 – Hardware Information...
  • Page 32: Sata Power Connector 1~2

    2.4.4 SATA Power connector 1~2 Pin name Signal Type Signal Level +12V +12V 2.4.5 SATA Signal connector 1~2 Pin name Signal Type Signal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF Chapter 2 – Hardware Information...
  • Page 33: Com1 Db9 Connector

    2.4.6 COM1 DB9 connector RS232 RS422 RS485 Chapter 2 – Hardware Information...
  • Page 34: Com1 (Wafer Box, Optional)

    2.4.7 COM1 (Wafer Box, Optional) Pin name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V Chapter 2 – Hardware Information...
  • Page 35: Mini-Card Slot (Full-Mini Card)

    2.4.8 Mini-Card Slot (Full-Mini Card) Pin name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V Chapter 2 – Hardware Information...
  • Page 36 Pin name Signal Type Signal Level SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V Chapter 2 – Hardware Information...
  • Page 37: Sim Slot

    2.4.9 SIM Slot Pin name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA 2.4.10 CPU FAN Socket Pin name Signal Type Signal Level +VCC_FAN_CPU_CON FAN_TAC_CPU_CON FAN_CTL_CPU_CON 2.4.11 PCIEx16 Port Standard specification Chapter 2 – Hardware Information...
  • Page 38: Spi Flash Port

    2.4.12 SPI Flash Port Pin name Signal Type Signal Level +3.3VSB +3.3V SPI_CS SPI_CLK SPI_MISO SPI_MOSI 2.4.13 DC-IN CONNECTOR Pin name Signal Type Signal Level +12V~+24V GND_EARTH Chapter 2 – Hardware Information...
  • Page 39: Lpc Port

    2.4.14 LPC Port Pin name Signal Type Signal Level +3.3V LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V LFRAME# +3.3V LRESET# LCLK LDRQ0 LDRQ1 +3.3V SERIRQ Chapter 2 – Hardware Information...
  • Page 40: Pwr Led/Hdd Led

    2.4.15 PWR LED/HDD LED Pin name Signal Type Signal Level HDD_LED- PWR_LED- Chapter 2 – Hardware Information...
  • Page 41: Cpu Installation

    CPU Installation Step 1: Shut down the system, disconnect power cord and ensure the system is turned off. Step 2: Have Intel KabyLake/Skylake/Xeon FCLGA1151 Processor (Max. TDP 65W – KabyLake/Skylake; 73W – Xeon) ready. Step 3: Install the CPU into the socket and place the thermal pad onto it. Chapter 2 –...
  • Page 42: 2.6 Ddr4 Memory Module Installation

    2.6 DDR4 Memory Module Installation Step 1: Shut down the system, disconnect power cord and ensure the system is turned off. Step 2: Remove the screws as shown below and remove the heatsink. Chapter 2 – Hardware Information...
  • Page 43 Step 3: Place the thermal pads onto the RAM modules as instructed below. Chapter 2 – Hardware Information...
  • Page 44: 2.5" Sata Drive Installation

    2.5” SATA Drive Installation Step 1: Shut down the system, disconnect power cord and ensure the system is turned off. Step 2: Remove the HDD cover. Step 3: Use the HDD screws provided to assemble 2.5” SATA drive with the HDD Bracket.
  • Page 45 Chapter 2 – Hardware Information...
  • Page 46: Graphics Card Installation

    Graphics Card Installation BOXER-8331AI-A1/A2 supports PCIe [x16] graphics card standard height at 114.55mm as below. Length should be under 350mm. Chapter 2 – Hardware Information...
  • Page 47 Note: Lock the extension card with the RISER Bracket. Chapter 2 – Hardware Information...
  • Page 48 BOXER-8331AI-A1/A2 supports graphics cards up to 180W (A1) or up to 250W (A2). Graphics cards up to 250W require dual power connectors from the board. Connect the graphics card to Power Cable 1 and Power Cable 2. Power Cable 1 Power Cable 2 Chapter 2 –...
  • Page 49 The dual power system requires a special power sequence. Please follow the power-up steps below Insert 12V-240W adaptor graphics power input. Chapter 2 – Hardware Information...
  • Page 50 Turn on the 12V adaptor. Check the 12V adaptor indicator LED is blue. Chapter 2 – Hardware Information...
  • Page 51 Insert 12V-24V adaptor system power input. Switch on the system and you will see the screen display on the monitor. Chapter 2 – Hardware Information...
  • Page 52: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 53: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, the system will sound a few short beeps or output an error message. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.
  • Page 54: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...
  • Page 55: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 56: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 57: Advanced: Cpu Configuration

    3.4.1 Advanced: CPU Configuration Options Summary Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). Intel (VMX) Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by...
  • Page 58: Advanced: Trusted Computing

    3.4.2 Advanced: Trusted Computing Options Summary Security Device Enabled Optimal Default, Failsafe Default Support Disabled Enable/Disable Security Device. NOTE: Your Computer will reboot during restart in order to change State of the Device. SHA-1 PCR Bank Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SHA-1 PCR Bank SHA256 PCR Bank...
  • Page 59 Options Summary Platform Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Platform Hierarchy Storage Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Storage Hierarchy Endorsement Enabled Optimal Default, Failsafe Default Hierarchy Disabled Enable or Disable Endorsement Hierarchy TPM2.0 UEFI Spec TCG_2 Optimal Default, Failsafe Default...
  • Page 60: Advanced: Sata Configuration

    3.4.3 Advanced: SATA Configuration Options Summary SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Device. SATA Mode AHCI Mode Optimal Default, Failsafe Default Selection Intel RST Premium With Intel Optane System Acceleration Determines how SATA controller(s) operate. Port 0/1/2/3 Enabled Optimal Default, Failsafe Default...
  • Page 61: Advanced: Pch-Fw Configuration

    3.4.4 Advanced: PCH-FW Configuration Chapter 3 – AMI BIOS Setup...
  • Page 62: Firmware Update Configuration

    3.4.4.1 Firmware Update Configuration Options Summary ME FW Image Re-Flash Enabled Disabled Optimal Default, Failsafe Default Enable or Disable ME FW Image Re-Flash function. Chapter 3 – AMI BIOS Setup...
  • Page 63: Advanced: Sio Configuration

    3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...
  • Page 64: Serial Port 1 Configuration

    3.4.5.1 Serial Port 1 Configuration Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Select an optimal setting for IO device Mode: RS232 Optimal Default, Failsafe Default...
  • Page 65: Advanced: Hardware Monitor

    3.4.6 Advanced: Hardware Monitor Options Summary Smart Fan Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Smart Fan Chapter 3 – AMI BIOS Setup...
  • Page 66: Smart Fan Mode Configuration

    3.4.6.1 Smart Fan Mode Configuration Auto Duty-Cycle Mode Options Summary Fan 1 Smart Fan Manual RPM Mode Control Manual Duty Mode Auto RPM Mode Auto Duty-Cycle Mode Optimal Default, Failsafe Default Smart Fan Mode Select Temperature Source System Optimal Default, Failsafe Default Select the monitored temperature source for this fan Temperature 1-100...
  • Page 67 Options Summary Duty Cycle 1-100 Range 1/2/3/4/5 100/95/90/85/80 Optimal Default, Failsafe Default Auto fan speed control. Fan speed will follow different temperature by different duty cycle 1-100 Auto RPM Mode Options Summary Fan 1 Smart Fan Manual RPM Mode Control Manual Duty Mode Auto RPM Mode Auto Duty-Cycle Mode...
  • Page 68 Options Summary Temperature 1-100 Range 1/2/3/4 60/50/40/30 Optimal Default, Failsafe Default Auto fan speed control. Fan speed will follow different temperature by different RPM 1-100 RPM Percentage 1-100 Range 1/2/3/4/5 85/70/60/50/40 Optimal Default, Failsafe Default Auto fan speed control. Fan speed will follow different temperature by different RPM cycle 1-100 Manual Duty Mode Options Summary...
  • Page 69 Options Summary Manual Duty 1-100 Range Mode Optimal Default, Failsafe Default Manual mode fan control. User can write expected duty cycle(PWM fan type) 1-100 Manual RPM Mode Options Summary Fan 1 Smart Fan Manual RPM Mode Control Manual Duty Mode Auto RPM Mode Auto Duty-Cycle Mode Optimal Default, Failsafe Default...
  • Page 70: Advanced: Usb Configuration

    3.4.7 Advanced: USB Configuration Options Summary Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Chapter 3 –...
  • Page 71: Amt Configuration

    3.4.8 AMT Configuration Options Summary AMT BIOS Features Enabled Optimal Default, Failsafe Default Disabled When disabled AMT BIOS Features are no longer supported and user is no longer able to access MEBx setup. Note: This option does not disable Manageability Features in FW Unconfigure ME Disabled Optimal Default, Failsafe Default...
  • Page 72: Advanced: Digital Io Port Configuration

    3.4.9 Advanced: Digital IO Port Configuration Options Summary DIO Type Output Optimal Default, Failsafe Default Input DIO Direction Type Setting DIO Data High Optimal Default, Failsafe Default DIO Output High/Low Setting Chapter 3 – AMI BIOS Setup...
  • Page 73: Advanced: Power Management

    3.4.10 Advanced: Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. AC Power Loss Last State Optimal Default, Failsafe Default Power On Power Off Select power state when power is re-applied after a power failure. RTC wake system Disabled Optimal Default, Failsafe Default...
  • Page 74 RTC: Fixed Time Options Summary RTC wake system from S5 Fixed Time Enable or disable System wake on alarm event. When enabled, System will wake on the hr::min::sec specified Wake up day Select 0 for daily system wake up, 1-31 for which day of the month that you would like the system to wake up Wake up hour Select 0-23 For example enter 3 for 3am and 15 for 3pm...
  • Page 75: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...
  • Page 76: Chipset: System Agent (Sa) Configuration

    3.5.1 Chipset: System Agent (SA) Configuration Options Summary Max TOLUD Dynamic Optimal Default, Failsafe Default 1 GB 1.25 GB 1.5 GB 1.75 GB 2 GB 2.25 GB 2.5 GB 2.75 GB 3 GB 3.25 GB 3.5 GB Maximum Value of TOLUD. Dynamic assignment would adjust TOLUD automatically based on largest MMIO length of installed graphic controller.
  • Page 77: Graphics Configuration

    3.5.1.1 Graphics Configuration Options Summary Primary Display Auto Optimal Default, Failsafe Default IGFX PCIE Select which of IGFX/PEG/PCI Graphics device should be Primary Display Or select SG for Switchable Gfx. Primary IGFX Boot VBIOS default Optimal Default, Failsafe Default Display HDMI 1 HDMI 2 Select the Video Device which will be activated during POST.
  • Page 78: Chipset: Peg Port Configuration

    3.5.2 Chipset: PEG Port Configuration Options Summary MAX Link Speed Gen1 Gen2 Gen3 Auto Optimal Default, Failsafe Default Configure PEG Max Speed Chapter 3 – AMI BIOS Setup...
  • Page 79: Chipset: Pch-Io Configuration

    3.5.3 Chipset: PCH-IO Configuration Options Summary HD Audio Disabled Enabled Auto Optimal Default, Failsafe Default Control Detection of the HD-Audio device. Disabled / Enabled = HDA will be unconditionally disabled / enabled Auto = HDA will be enabled if present, disabled otherwise. Riser Card x1 PCIe Auto Optimal Default, Failsafe Default...
  • Page 80: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.
  • Page 81: Setup Submenu: Boot

    Setup submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enables or disables Quiet Boot option. Launch PXE OpROM Disabled Optimal Default, Failsafe Default Enabled Controls the execution of UEFI and Legacy PXE OpROM. Chapter 3 – AMI BIOS Setup...
  • Page 82: Boot: Bbs Priorities

    3.7.1 Boot: BBS Priorities Chapter 3 – AMI BIOS Setup...
  • Page 83: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup...
  • Page 84: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...
  • Page 85: Drivers Installation

    Drivers Installation Drivers for the BOXER-8331AI can be downloaded from the product page on the AAEON website. Download the driver(s) you need and follow the steps below to install them. Note: System Driver only supports "Win7 64bit". "Win7 32bit" is not supported. Step 1 –...
  • Page 86 Step 4 – Install Audio Driver Open the Step 4 - Audio folder and select the correct chipset and OS Open the .exe file in the folder Follow the instructions Drivers will be installed automatically Step 5 – Install USB3.0 Driver Open the Step 5 –...
  • Page 87 Step 8 – Install TPM Hotfix Driver Open the Step 8 – TPM Hotfix (Optional) folder and select the correct chipset and OS Open the .exe file in the folder Follow the instructions Drivers will be installed automatically Chapter 4 – iX Developer...
  • Page 88: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...
  • Page 89: Watchdog Timer Initial Program

    Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 90 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 91 ********************************************************************************* Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ********************************************************************************* Appendix A – Watchdog Timer Programming...
  • Page 92 ********************************************************************************* // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 0 // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting();...
  • Page 93 ********************************************************************************* SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 <<...
  • Page 94: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...
  • Page 95: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 96 Appendix B – I/O Information...
  • Page 97: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 98: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 99: Appendix C - Electrical Specifications For I/O Ports

    Appendix C Appendix C – Electrical Specifications for I/O Ports...
  • Page 100: Electrical Specifications For I/O Ports

    Electrical Specifications for I/O Ports Appendix C – Digital I/O Information...
  • Page 101: C.2 Dio Programming

    C.2 DIO Programming BOXER-8331AI utilizes the FINTEK 81866 chipset as its Digital I/O controller. This section details procedures to complete configuration of the chipset, as well as AAEON initial Watchdog Timer program which can be customized to fit your application. There are three steps to complete the configuration setup.
  • Page 102: C.3 Digital I/O Register

    C.3 Digital I/O Register Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Digital Input relative register table Register BitNum Value...
  • Page 103 Table 3 : Digital Output relative register table Register BitNum Value Note DIO-3 Output 0x06(Note35) 0x89 (Note36) 3(Note37) (Note38) GPIO83 Data DIO-4 Output 0x06(Note39) 0x89 (Note40) 2(Note41) (Note42) GPIO82 Data DIO-5 Output 0x06(Note43) 0x89 (Note44) 5(Note45) (Note46) GPIO85 Data DIO-6 Output 0x06(Note47) 0x89 (Note48) 4(Note49)
  • Page 104: C.4 Digital I/O Sample Program

    C.4 Digital I/O Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Digital Input Status relative definition (Please reference to Table 2) #define byte DInput1LDN // This parameter is represented from Note3 #define byte DInput1Reg // This parameter is represented from Note4...
  • Page 105 ************************************************************************************ // Digital Output control relative definition (Please reference to Table 3) #define byte DOutput1LDN // This parameter is represented from Note27 #define byte DOutput1Reg // This parameter is represented from Note28 #define byte DOutput1Bit // This parameter is represented from Note29 #define byte DOutput1Val // This parameter is represented from Note30 #define byte DOutput2LDN // This parameter is represented from Note31 #define byte DOutput2Reg // This parameter is represented from Note32...
  • Page 106 ************************************************************************************ Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low 1: Digital I/O Pin level is High PinStatus = AaeonReadPinStatus(DInput3LDN, DInput3Reg, DInput3Bit); // Procedure : AaeonSetOutputLevel // Input : Example, Set Digital I/O Pin 6 level...
  • Page 107 ************************************************************************************ AaeonReadPinStatus(byte LDN, byte Register, byte BitNum) Boolean Boolean PinStatus ; PinStatus = SIOBitRead(LDN, Register, BitNum); Return PinStatus ; AaeonSetOutputLevel(byte LDN, byte Register, byte BitNum, byte Value) VOID ConfigToOutputMode(LDN, Register, BitNum); SIOBitSet(LDN, Register, BitNum, Value); ************************************************************************************ Appendix C – Digital I/O Information...
  • Page 108 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 <<...