Voltage Lockouts; Circuit Board Layout Checklist; Design Example - Linear Technology Analog Devices LT8708-1 Datasheet

TYPICAL APPLICATIONS
approach that is used for compensating the LT8708's
input current regulation loops.
3. Complete the multiphase system with the LT8708
and LT8708-1(s). A few nF of capacitance should be
placed on the ICP and ICN pins near the LT8708 for
proper compensation. In addition, adding a few hun-
dred Ohms in series with these capacitors can often
provide extra phase margin to the multiphase system.
See Figure 2 as an example.
4. Perform the loop stability analysis in simulation and/
or on the bench. Primarily, adjust the LT8708's V
compensation network for stability. A trim pot and
selectable capacitor bank can be used on the V
to determine the optimal values. Typically, the LT8708
should be adjusted to have lower bandwidth than the
LT8708-1 phases. This can be achieved by increasing
the capacitance and/or reducing the series resistance
of the LT8708's V compensation network.
C
If the LT8708 operates in constant current limit, as
set by one or more of the IMON_xx pins, adjust the
respective LT8708 IMON_xx filter capacitors as well
to achieve optimal loop stability.

VOLTAGE LOCKOUTS

The LT8708-1 offers the same voltage detectors as the
LT8708 to make sure the chip is under proper operat-
ing conditions. See the Voltage Lockouts section of the
LT8708 data sheet for more details.
Although allowed with a standalone LT8708, a resistor
divider connected to the SWEN pins should never be
used for undervoltage detection in a multiphase system
(see the Start-Up: SWEN Pin section for proper ways to
connect or drive the SWEN pin in a multiphase system).
Instead, an external comparator chip can be used to mon-
itor undervoltage conditions, and its output drives the
common SWEN node in a multiphase system through a
current limiting resistor.

CIRCUIT BOARD LAYOUT CHECKLIST

The LT8708's circuit board layout guidelines also apply
to the LT8708-1(s). Refer to the Circuit Board Layout
Checklist section of the LT8708 data sheet for details.
In addition:
• Route the ICP and ICN traces together with mini-
mum PCB trace spacing from the LT8708 to the
LT8708-1(s). Avoid having these traces pass through
noisy areas, such as switch nodes.
• Star connect the V
C
as the power GND bus to each LT8708/ LT8708-1(s).
Minimize the voltage difference between local V
pin
C
V
OUT

DESIGN EXAMPLE

In this section, we start with the Design Example in the
LT8708 data sheet, and expand it into a 2-phase regula-
tor. The design requirements from the LT8708 data sheet
are listed below with the total output current (I
the total input current (I
phases.
V = 8V to 25V
IN
V
IN_FBIN
FBIN loop)
V
OUT_FBOUT
LT8708 FBOUT loop)
I
OUT(MAX, FWD)
I
IN(MAX, RVS)
f =150kHz
This design operates in CCM.
Maximum ambient temperature = 60°C
Use the same R
tor, external MOSFETs and capacitors from the Design
Example of the LT8708 data sheet for LT8708-1.
SYNC Pin: Since this is a 2-phase system, the slave chip
operates 180° out of phase from the master chip. Connect
the LT8708's CLKOUT pin to the LT8708-1's SYNC pin.
For more information www.analog.com
and V
IN OUT
and power GNDs, respectively.
) specifications doubled for two
IN
= 12V (V regulation voltage set by LT8708
IN
= 12V (V regulation voltage set by
OUT
= 10A
= 6A
, R , R
T SENSE SENSE2
LT8708-1
power buses as well
,
IN
) and
OUT
resistors, induc-
Rev 0
29