Transfer Function: Iout(Slave); Vs Iout(Master) - Linear Technology Analog Devices LT8708-1 Datasheet

LT8708-1
OPERATION
A 1* to 3* indicates that the error amplifier listed for that
row is disabled under that column's condition. The pur-
poses of disabling the respective amplifiers are:
1* This improves transient response when VOUTLOMON
de-asserts.
2* This improves transient response when VINHIMON
de-asserts.
3* Since power can only transfer from V
prevents higher FBOUT/V
ing with the FBIN/V
IN
The primary regulation loop for the LT8708-1 involves EA6,
which regulates the average I
and ICN input voltages. Therefore, the IMON_OP pin must
always have a proper compensation network connected.
See the Loop Compensation section for more information.
The remaining error amplifiers can be disabled or used to
limit their respective voltages or currents. When unused,
the respective input pin(s) should be driven so that they
do not interfere with the operation of the remaining ampli-
fiers. Use Table 6 as a guide.
Table 6. Disabling Unused Amplifiers
AMPLIFIER
NAME PIN NAME
EA1 IMON_INN
EA3 FBIN
EA4 FBOUT
EA5 IMON_INP
TRANSFER FUNCTION: I
The LT8708-1 regulates I
I following the transfer functions
OUT(MASTER)
Figure 5 and Figure 6. The currents are measured (sensed)
by the differential CSPOUT–CSNOUT pin voltages for each
phase and the information is sent from the master to the
slaves via the ICP and ICN pins. The transfer functions
are represented by the slave's current sense voltage
(V ) vs the master's current sense volt-
(CSPOUT–CSNOUT)S
age (V ). To convert the axes of Figure 5
(CSPOUT–CSNOUT)M
and Figure 6 to I
OUT(SLAVE)
1. The ICP and ICN pins must be connected between the master and slave
chips. 17.4k resistors and appropriate parallel capacitors are also required
from those pins to ground.
20
to V
OUT IN
voltages from interfer-
OUT
voltage regulation.
based on the ICP
OUT(SLAVE)
TIE TO EXAMPLE DISABLED
DISABLE PIN CONNECTION
< 0.9V GND
> 1.5V LDO33
< 0.9V GND
VS I
OUT(SLAVE) OUT(MASTER)
proportionally to
OUT(SLAVE)
1
shown in
vs I , simply divide
OUT(MASTER)
For more information
80
60
40
20
0
–20
–40
–60
, this
–80
–80 –60 –40 –20
Figure 5. Typical V
V
(CSPOUT–CSNOUT)M
70
60
50
40
30
20
10
0
0
Figure 6. Typical V
in FDCM, FHCM and Burst Mode Operation
V
(CSPOUT–CSNOUT)S
and master's R
SENSE2
Figure 5 shows that increasing the master's average
current sense voltage V
results in no additional current from the slave LT8708-1.
As such, the average of V
limited to ±50mV by connecting appropriate resistors
from the IMON_OP and IMON_ON pins of the LT8708
to ground (see the I
Limiting section of the LT8708 data sheet).
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0 20 40 60
V (mV)
(CSPOUT–CSNOUT)M
87081 F05
(CSPOUT–CSNOUT)S
1
in CCM
10 20 30 40 50 60 70
V (mV)
(CSPOUT–CSNOUT)M
87081 F06
vs V
(CSPOUT–CSNOUT)S (CSPOUT–CSNOUT)M
1
and V
(CSPOUT–CSNOUT)M
values, respectively.
above ±60mV
(CSPOUT–CSNOUT)M
(CSPOUT–CSNOUT)M
and I Current Monitoring and
IN OUT
80
vs
80
by the slave's
should be
Rev 0