Interfaces To Other Systems And Devices; Uart; I 2 C Bus; Jtag - TQ-Systems TQMLS1028A Preliminary User's Manual

4.14

Interfaces to other systems and devices

4.14.1

UART

The UART interfaces are directly connected to the TQMLS1028A connectors.
4.14.2 I C bus
2
Table 9: I2C1 device addresses
Function
Data EEPROM
System Controller
RTC
Temperature Sensor
Temperature Sensor / EEPROM
All six I C buses of the LS1028A CPU (I2C1 to I2C6) are not terminated and routed to the TQMLS1028A connectors.
2
The I2C1 bus is level shifted to 3.3 V and terminated with 4.7 kΩ pull-ups to 3.3 V on the TQMLS1028A.
The I 2 C devices on the TQMLS1028A are connected to the level-shifted I2C1 bus. More devices can be connected to the bus, but
additional external pull-ups may be necessary on account of the relatively high capacitive load.
4.14.3

JTAG

On the MBLS1082A is a 20-pin pin header with 100 mil pitch where various debuggers can be connected.
Alternatively the LS1028A CPU can be addressed via OpenSDA.
4.15

TQMLS1028A interfaces

4.15.1

Pin multiplexing

When using the processor signals the multiple pin configurations by different processor-internal function units must be taken
note of. The pins assignment listed in
Table 10, and
Table 11 refer to the corresponding standard BSP of TQ-Systems GmbH in combination with the Starterkit MBLS1028A.
Attention: Destruction or malfunction
Depending on the configuration many CPU pins can provide several different functions.
Please take note of the information concerning the configuration of these pins in (1), before
integration or start-up of your carrier board / Starterkit.
3: Address is compatible to ADT7461, LM86, MAX6657/8 und ADM1032.
Preliminary User's Manual l TQMLS1028A UM 0001 l © 2019, TQ-Systems GmbH
Device
24LC256
MKL04Z16
PCF85063A
SA560004EDP 3
SE97BTP
Address (7 bit) / (8 bit)
0x57 / 1010 111b
0x11 / 0010 001b
0x51 / 1010 001b
0x4C / 1001 101b
0x18 / 0011 000b
0x50 / 1010 000b
0x30 / 0110 000b
Page 15
Remark
–
–
–
–
Temperature
EEPROM, unprotected
EEPROM, protected