Racal Instruments 1260-14C Manual page 42

1260 vxi switching card, open collector digital i/o module
Table of Contents

Advertisement

User Manual 1260-14C
one width may be active at a time and is specified as follows:
A "Y" specifies a byte-wide (8-bit) write to a port. If the port was
previously defined using a word width, the data associated with the
companion port will be cleared, and the port will be disabled in
future synchronous operations until redefined. When a port is first
defined as synchronous, it defaults to byte-wide operations, so it is
only necessary to specify a byte width if the user is changing from
a different width, or wishes to clear the buffer. See Example 1
above for a sample of a byte-wide synchronous write setup.
A "W" specifies a word-wide (16 bit) write to a pair of ports. Word-
wide operations are specified on even-numbered ports only, and
place the least significant 8 bits in the even port and the most
significant 8 bits in the following odd-numbered port. Word sized
operations may not be mixed with bit or byte operations in either
the even or odd port. If either the even or the odd port is redefined
as a byte-wide or a bit-wide port, both ports will have their buffers
cleared and the matching odd or even companion port will be
disabled in future synchronous operations until redefined.
Example 2:
Assume that ports 0-3 are synchronous ports, ports 2 and 3 were
previously defined as synchronous word-wide write ports and the
user sends the following commands:
SETUP 1.WR 0,W,H5F01,H6F02,H7F03
SETUP 1.WR 2,Y,16,8,4,2,1
The first command would clear the buffers for ports 0 and 1, and
would cause the module to perform a word wide write of three
vectors to ports 0 and 1 during the next synchronous test, finishing
the test with the value of hex 03 in port 0 and hex 7F in port 1.
The second command would clear the buffers for ports 2 and 3
and would cause a byte-wide write of five vectors to port 2 during
the next synchronous test, finishing the test with a value of 1 in
port 2. Port 3 would be disabled from participating in subsequent
tests until redefined.
An "X" specifies a bit-wide write to a port. Any of the 8 bits from 0-
7 may be set to 0 (Low) or 1 (High) by using the form Lx or Hx,
where x is the bit to modify. Multiple bits may be modified by
separating the bit transitions with commas. Multiple vectors may
be set up by separating the changes for each vector with
semicolons. Bits that are not modified remain in their previous
states. If the port was previously defined using a word width, the
data associated with the companion port will be cleared, and the
port will be disabled in future synchronous operations until
redefined.
Module Specific Syntax 3-19
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com

Advertisement

Table of Contents
loading

Table of Contents