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GB 74
9.
9. Circuit Description
Index:
1. Introduction
2. Audio Signal Processing
3. Video Signal Processing
4. Synchronisation
5. Deflection
6. Power Supply
7. Control
8. Abbreviations
Note:
•
Figures can deviate slightly from the actual situation, due
to different set executions.
•
For a good understanding of the following circuit
descriptions, please use the block diagram in chapter 6,
or the electrical diagrams in chapter 7. Where necessary,
you will find a separate drawing for clarification.
9.1
Introduction
The L01 chassis is a global TV chassis for the model year
2001 and is used for TV sets with screen sizes from 14" to 21"
(small screen) and 21" - 34" (large screen), in Super Flat and
Real Flat executions.
The standard architecture consists of a Main panel, a Picture
Tube panel, a Side I/O panel and a Top Control panel. In
some executions, a Picture In Picture (PIP) panel is used.
The Main panel consists primarily of conventional
components with hardly any surface mounted devices.
Figure 9-1
The functions for video processing, microprocessor (mP) and
teletext (TXT) decoder are combined in one IC (TDA958xH),
the so-called Ultimate One Chip (UOC). This chip is (surface)
mounted on the copper side of the LSP.
Figure 9-2
L01.1A
Circuit Description
The L01 is divided into 2 basic systems, i.e. mono and stereo
sound. While the audio processing for the mono sound is
done in the audio block of the UOC, an external audio
processing IC is used for stereo sets.
The tuning system features 100 (or 125) channels with on-
screen display. The main tuning system uses a tuner, a
microcomputer, and a memory IC mounted on the main
panel.
Also, in some type numbers, an FM radio is implemented
with 40 pre-set channels.
The microcomputer communicates with the memory IC, the
customer keyboard, remote receiver, tuner, signal processor
IC and the audio output IC via the I
retains the settings for favourite stations, customer-preferred
settings, and service/factory data.
The on-screen graphics and closed caption decoding are
done within the microprocessor, and then sent to the signal
processor IC to be added to the main signal.
The chassis uses a Switching Mode Power Supply (SMPS)
for the main voltage source. The chassis has a 'hot' ground
reference on the primary side and a cold ground reference on
the secondary side of the power supply and the rest of the
chassis.
9.2
Audio Signal Processing
9.2.1
Stereo
In stereo sets, the signal goes via the SAW filter (position
1004 in case of QSS demodulation and 1003 in case of
Intercarrier demodulation), to the audio demodulator part of
the UOC IC7200. The stereo audio output on pin 33 goes, via
TS7201, to the stereo decoder 7831.
The switch inside the stereo decoder 7831 selects (via I
either the internal decoder or an external source.
The NICAM + 2CS AM/FM stereo decoder is an ITT
MSP34X5.
The output is fed to the to the audio amplifier (AN7522 at
position 7901). The volume level is controlled at this IC (pin
9) by a control line (VolumeMute) from the microprocessor.
The audio signal from 7901 is then sent to the speaker/
headphone output panel.
AUDIO SOURCE SELECTION
EXT. AUDIO
7801
INPUT
7209
7210
FM
FM IF
FMR
BUFFER
7200
33
RF ANT.
SIF
SOUND
SAW
23
FM ANT.
IF
FILTER
24
DEMOD.
1000
10
0265
VIF
TUNER
11
18
VISION
1
1
SAW
IF
19
FILTER
DEMOD.
1
AGC
22
1200 : 1202
38
SOUND
TRAP
INT_CVBS
40
EXT_CVBS
EXT. VIDEO
42
7802
INPUT
VIDEO
SWITCH
VIDEO SOURCE
SELECTION
V BAT
AUDIO
POWER
12V
SUPPLY
3.9V
3.3V
Figure 9-3
2
C bus. The memory IC
7861
7831
EXT. AUDIO OUT
CONTROL
AUDIO DECODING
AND
7901
PROCESSING
SELECTION
47
24
MATR. SWITCH
AUDIO
AMPL.
25
7834
7835
7602
µP
68
NVM
I2C
50:53
EXT RGB/YUV INPUT
7330
VIDEO
RGB/YUV
56:58
VIDEO
PROCESSING
PROCESSING
AMPL.
SYNC
PROCESSING
EHT
7460
16
17
15
30
H
HOR.
DEFL.
+
EW
EW
7471
V+
VERT.
DEFL.
V-
CL 16532008_039.eps
2
C)
220501
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