models, and which specifies BC
0:["
EC mode in System/370 models.
ASCII
mode is not implemented in the Model 145, nor was the mode bit supported
by IBM programming systems provided for System/360 models, as System/360
USASCII-8 did not become the ASC:[I st,andard.
However, ASCII-encoded
tapes will
be
supported by certain OS and DOS programs.
That is, ASCII-
mode tapes will
be
accepted as illlput and converted to EBCDIC for
processing.
The capability of wlriting ASCII-mode tapes is also
provided.
(see Section 30 for a discussion of OS MFT and MVT and DOS
Versions 3 and 4 support of ASCL[-mode tapes.)
To enhance system availabilit]( and serviceability, implementation of
the machine check class of interJruption in the Model 145 has been
considerably altered from its implementation in Models 30 and 40 (see
section 50).
However, the other four interruption classes operate in
the same manner on Models 30, 40., and 145 except for the expansion of
external interruption masking in the Model 145.
Three external subclass
mask bits, which allow selective masking of external signals (2-7),
timing facilities, and console panel interrupt key interruptions, are
provided in control register
O~
When the PSW external mask bit is off,
the CPU is disabled for all
threE~
external interruption types.
When the
PSW external mask bit is on, a console interrupt key, an interval timer,
a time of day clock, a clock comparator, a CPU timer, or an external
signal interruption occurs only if its associated subclass mask bit is
on also.
EXTENDED CONTROL MODE
Extended control mode, unlike basic control mode, is exclusively a
System/370 mode.
Note that:
IBM-s~upplied
operating s:ystems do not
support System/370 models operati.ng in EC mode without dynamic address
translation operative also.
Faci.lities that depend on which mode is in
effect are discussed below.
Any item not covered operates identicaliy
in BC and EC modes.
Change in PSW Format
When a system/370 operates in EC mode, the format of the PSW differs
from its BC mode format.
Both PSW formats are shown in Figure 10 .. 10,.1.
In EC mode, the PSW does not contain individual channel mask bits, an
instruction length code, or the interruption code for a supervisor call,
external, or program interruption.
The channel masks are contained in
control register 2, and the other fields are allocated permanently
assigned locations in the fixed lower processor storage area above
address 127.
Removal of the fields indicated. provides room in the EC mode PSW for
control of new features that are unique to EC mode (such as PER and OAT)
and for the addition of summary mask bits (such as channel and I/O
masks).
Use of a single mask bit to control the operation of
an
entire
facility (such as program event
r~ecording)
or an entire interruption
class, (such as I/O and external) simplifies the coding required to
enable and disable the system for these interruptions.
Change in Permanently Assigned Processor Storage Locations
When a System/370 operates in
]~C
mode, the number of permanently
assigned locations in lower
proce~:;sor
storage is increased to include
fields for storing instruction ,length codes, interruption codes (for
supervisor call, external, and program interruptions), program event
recording data, the I/O device ad(rress for an I/O interruption, and an
exception address for the OAT fea1ture.
The model-independent BC mode
and EC mode fixed storage areas for system/370 models are shown in
Figure 10.10.2.
The balance of the fixed area for the Model 145, that
which has model-dependent fields, is shown in Figure 50.10.3.
The
A Guide to the IBM system/370
ModE~1
145
15
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