Control Output Section (/Fault); Figure 4 Short Pulse Suppression (Left: Short On Pulse; Right: Short Off Pulse) A) And B): Negative Logic C) And D): Positive Logic; Figure 5 Schematic Of The Structure Of The /Fault-Pin - Infineon EiceDRIVER 6ED Series Application Note

a)
t
HIN/LIN
Neg. logic
HO/LO
HIN/LIN
HO/LO
c)
t
HIN/LIN
Pos. logic
HO/LO
HIN/LIN
HO/LO
Figure 4 Short pulse suppression (left: short ON pulse; right: short OFF pulse)
a) and b): negative logic
c) and d): positive logic
3.3

Control output section (/FAULT)

Figure 5 Schematic of the structure of the /FAULT-pin
This pin indicates the failure status of the IC. The level of this pin is LOW in case of undervoltage lockout or
triggering of the overcurrent protection. An external pull-up resistor to VDD in the range of a few kΩ (e.g. 4.7 k)
is necesary for this open drain pin. The voltage at this pin is internally clamped to VCC, as one can see in the
internal structure according to Figure 5,. The internal pull-down FET has a typical resistance of R
The delay time from the triggering event to the change of status at the /FAULT-pin is t
according to the timing diagram shown in Figure 6.
Application Note
AN-EICEDRIVER-6EDL04-1
t
FILIN
IN
low
t
IN
t
FILIN
IN
low
t
IN
V
DD
V
CC
FAULT
b)
HIN/LIN
t < t
IN FILIN
HO/LO
HIN/LIN
t > t
IN FILIN
HO/LO
d)
HIN/LIN
t < t
IN FILIN
HO/LO
HIN/LIN
t > t
IN FILIN
HO/LO
6ED family – 2nd generation
R
ON,FLT
from ITRIP-Latch
>1
from uv-detection
11
6ED family - 2nd generation
Technical Description
t
FILIN
t
IN
high
t
IN
t
FILIN
t
IN
high
t
IN
= 450 ns typically
FLT
Rev. 1.3, 2014-03-23
t < t
IN FILIN
t > t
IN FILIN
t < t
IN FILIN
t > t
IN FILIN
= 61 .
ON,FLT