SIGNAL NAME
RESET Line
BUSRQ Line
BUSAK Line
A11
A12
A13
A14
A15
D4
DS
Figure
Table
280 Slgnals (cont)
3-1.
DESCRIPTION
The
RESET line is
low level,
resets the program
logic
registers to zero, disables interrupt
W
and floats
line,
high impedance state.
The
BUSRQ line is
causes
low level,
logic
of the system bus
by
associated control lines to a high impedance state.
The
BUSAK
output
acknowledges a
BUSRQ
meO11>OJM—l
CO
10
11
12
13
14
15
16
17
18
19
20
280
3-1.
Pin
Assignments
an input which, when placed at a
counter
requests
tri-state bus signals to the
all
an input which, when placed at a
the 280 to relinquish control
floating the address, data and
when the 280
is
pulled
low
input. See
BUSRQ.
ZBOQT
other
and
the
by