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9000A-Z8OQT
859447
P/
N
March
1989
John
Fluke Mfg. Co.. Inc.
©1989.
rights reserved.
Litho
All
Instruction Manual
U.S.A.
in
INTERFACE POD
F
LU
K
E

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Table of Contents
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Summary of Contents for Fluke 9000A-Z80QT

  • Page 1 9000A-Z8OQT INTERFACE POD Instruction Manual 859447 March 1989 John Fluke Mfg. Co.. Inc. ©1989. rights reserved. Litho U.S.A.
  • Page 2 THE FOREGOING WARRANTY OTHER EXCLUSIVE LIEU WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED IMPLIED WARRANTY OF MERCHANTABILITY, F ITNESS, OR ADEQUACY FOR PARTICULAR PURPOSE OR USE. FLUKE SHALL NOT BE LIABLE OR CONSEQUENTIAL DAMAGES, WHETHER CONTRACT, SPECIAL, INCIDENTAL, TORT, OR OTHERWISE.
  • Page 3: Table Of Contents

    ZBOQT Table Contents PAGE TITLE SECTION ........INTRODUCTION ....PURPOSE INTERFACE POD 1-1..... DESCRIPTION INTERFACE POD 1-2, ......SPECIFICATIONS 1-3........INSTALLATION INSTALLING THE Z80QT DATABASE 2-1......(9100 SERIES ONLY) ...... MAKING CONNECTIONS 2-2......POWER CONNECTIONS 2-3.......
  • Page 4 Z8OQT CONTENTS, TABLE OF (continued) PAGE SECTION TITLE ..Using the 9000 Series for Quick RAM Testing 3-10 3-18..Using the 9000 Series for Quick ROM Testing 3-19. 3—13 ..Using the 9100 Series for Quick RAM Testing 3-15 3—20.
  • Page 5 Z8OQT CONTENTS, TABLE OF (continued) PAGE TITLE SECTION ....... OF REPLACEABLE PARTS LIST ......INTRODUCTION 6-1....... PARTS HOW TO OBTAIN 6-2. 6—1 ......SCHEMATIC DIAGRAMS APPENDIX POD FROM TL/l PROGRAMS USING THE Z8OQT...
  • Page 7 ZSOQT Tables List PAGE TITLE TABLE ....... Z80QT Interface Pod Specifications 1.[_ ..........Z80 Signals 3-l....Status and Control Lines Bit Assignments 3-2_ ....Quick—Looping Read and Write Test Addresses 3-3....Quick RAM Test Addresses and Status Codes 3-12 3-4, ....
  • Page 8 Z8OQT Illustrations List FIGURE TITLE PAGE ......Relationship of Interface Pod 1—1....Connection of Interface Pod to 9000 Series 2—1....Connection of Interface Pod to 9100 Series 2-2......Connection Interface Pod 2-3........3-1. 280 Pin Assignments ........
  • Page 9: Introduction

    ZBOQT Section Introduction PURPOSE OF INTERFACE POD 1-1. The 9000A-280QT Interface Pod (hereafter referred to the pod) interfaces Series tester (hereafter referred to any 9000 Series the mainframe) to a 9100 that uses a Z80 microprocessor. piece of equipment The 9000 Series Digital Troubleshooters and 9100 Series Digital Test Systems test...
  • Page 10: Specifications

    1-3. SPECIFICATIONS for the 9000A-Z80QT Interface Pod are listed in Table 1-1. Specifications...
  • Page 11 ZBOQT 2<m m0<umwkz_ 5.0m m0<mmm._.2_ Fwy—00m mmOmn. mOmmwOOmaOm—QE w§<mu2_<_2 mXDJE Doom memw Relationship of Interface Pod 1-1. Flgure...
  • Page 12 ZSOQT Intertace Pod Specifications Table 1-1. ZSOQT ELECTRICAL PERFORMANCE ..3.0 watts maximum Power Dissipation ..Electrical Protection be applied between ground -7 to +12V may and any single ribbon cable contin— plug pin the pod uously long powered mainframe. MICROPROCESSOR SIGNALS ....
  • Page 13 ZBOQT Interface Pod Specifications (cont) Table 1-1. ZBOQT GENERAL ......Size Widex18.550m Deep 3.3 cm Highx10.2 Wide High x 4.0 (1.3 Deep) ..... 0.68 Weight kg (1.5 lbs) Environmenl ....STORAGE to +70°C, < —40° ....< to +25°C, 0° OPERATlNG <...
  • Page 15: Installation

    ZBOOT DATABASE ONLY) The Z80QT database for the mainframe contained on one 3.5-inch 9100—Series disk supplied with the 9000A-Z80QT Pod. floppy install database on a mainframe with hard drive, insert the disk into the drive. Press MAIN MENU on the keypad, press SOFT mainframe floppy...
  • Page 16 ZBOQT ribbon cable plug correctly in the UUT micro- install the sure processor socket. ribbon cable plug only. Do The self test socket intended use with the from other insert any device removed microprocessor a UUT, or any into this socket. Connect the pod between the mainframe and the UUT as follows: from Remove power...
  • Page 17 Z8OQT Conneclion oi Interface Pod to Series 2-1. Figure 9000 POD CONNECTS HERE Connection lnterlace Pod to 2-2. Series Figure 9100...
  • Page 18 ZBOQT Figure Connection 2-3. Interface Pod to...
  • Page 19: Pod Signals And Functions

    ZBOQT Section Signals and Functions INTRODUCTION 3-1. a reference source for Z80QT and 280 microprocessor This section pod—specific this section includes descriptions of Z80 signals, information. Information explanations of status/control and address space assignment, effects the lines pod may have on normal UUT operation, pod capabilities and limitations, and other...
  • Page 20: Signals

    ZBOQT Table 280 Signals (cont) 3-1. DESCRIPTION SIGNAL NAME identifies a memory output access MREQ MREQ Line progress. The 280 places operation MREQ access logic during any memory operation. addition, MREQ is a high impedance state placed operations. See during BUSRQ.
  • Page 21 ZBOQT Table 280 Slgnals (cont) 3-1. DESCRIPTION SIGNAL NAME an input which, when placed at a RESET line is RESET Line counter low level, resets the program other logic registers to zero, disables interrupt requests and floats tri-state bus signals to the line, high impedance state.
  • Page 22: Introduction

    Z8OQT 3-3. STATUS/CONTROL LINES AND ADDRESS SPACE ASSIGNMENT Introduction 3-4. Series and 9100 Series mainframes accommodate bus-oriented 9000 data address lines, processors having up to status lines, and lines, control lines. The pod provides an interface between the general architecture of ofthe the mainframe and the specific requirements Z80 microprocessor.
  • Page 23 ZBOQT Lines Control 3-7. Assignment There are two troubleshooting functions which require the entry binary digits data control lines. These functions are write control and to identify user—writable toggle control. programming either of these two When performing functions, the user number control for a binary...
  • Page 24: Forcing And Lines Enabled

    ZSOQT Status and Table Control LInes 3-2. Assignments CONTROL STATUS LINES LINES BIT NO. SIGNAL BIT NO. SIGNAL PWR FAIL — — *‘ RESET fi— Kin—o fit? ” BUSRQ *H—AL_T "WATT *BUSAK ‘User writeable "Forcing Lines address exists within the address space to set the value of the special register in the Z80 microprocessor.
  • Page 25 ZBOQT 3-10. DURING MAINFRAME SETUP LINES ENABLED the mainframe, the During has the option operator enabling setup enabling certain forcing lines a means of preventing UUT faults from disabling the pod microprocessor. the 280, these lines include BUSRQ and WAIT. Also during mainframe setup, the to report may elect operator...
  • Page 26: Quick-Looping

    ZBOQT CAUTION possible damage to the prevent probe do not UUT, the probe to stimulus pulses generate Quick- while a Looping function crystal or clock being performed less than frequency MHz. The preceding caution combination necessary because the of the high repetition rate of Quick-Looping function and a slow UUT clock (below...
  • Page 27: Read And Write

    Z8OQT Enter ENTER. the address you want to read, followed by contents of The mainframe displays the the address (from the first in control read), and the pod the looping process. Quick-Looping write using the 9100 Series start mainframe, proceed follows: Press the POD key.
  • Page 28: Quick Ram

    Z8OQT that memory contains verification test simply verifies pattern data. The test should be used following a normal Quick RAM expected that contains correct data the memory still after a longer test to verify than normal RAM checked by the test.
  • Page 29 ZSOQT example, to specify a normal Quick RAM test addresses 5000 over through 5FFF with the default address increment do the following two operations: @ 20 5000=0 WHITE @ 20 5FFF=1 WRITE that follow test with verification test over the same address space, pattern rewrite the ending address with the new specification: @ 20 5FFF=2...
  • Page 30: Quick Ram Test Addresses And Status Codes

    Z8OQT Test Addresses and Status Codes Table Quick 3-4. OPERATION PARAMETERS WRITE @ Start Address 2X XXXX=0 XXXX = Address WRITE @ 2Y YYYY=ZN Y YYYY = Increment Test Specification: Test Perform Pattern Check Verify Returns Status READ @ ENTER Code: test requested new command entered...
  • Page 31 Z8OQT Series Quick 3-19. 9000 Testing Using NOTE Special addresses mentioned in the are also followingparagraphs valid Series mainframes. However, they are 9100 necessary because the 9100 Series provides softkeys to directly access these recommended method functions. running pod— controlled the 9100 Series under testsfrom...
  • Page 32 ZBOQT Addresses and Status Codes Table Quick ROM Test 3-5. OPERATION PARAMETERS Start Address WRITE @ 3X XXXX=0 XXXX = Address WRITE @ 3Y YYYY=21 Y YYYY = Increment Returns Status READ @ ENTER Code: test requested new command entered Aborted, command data...
  • Page 33: Using The 9100 Series For Quick Ram Testing

    ZBOQT Series Quick 3-20. 9100 Testing Using Proceed as follows to start a Quick RAM test using the 9100 Series mainframe: Press the RAM key, followed by the key if necessary to right-arrow display the QUICK softkey. Press the QUICK softkey, followed by ENTER. Enter the beginning address, followed by the right-arrow key.
  • Page 34: Quick Fill And Verify

    Z8OQT QUICK AND VERIFY 3-22. FILL Quick Fill and Verify blocks of memory with user-selected data, then verifies fills controlled the accuracy of the contents. Quick Fill and Verify is by writing setup informationinto special addresses described below. than Quick Fill and Verify tests are much faster the mainframe’s normal memory customize special memory tests, such tests.
  • Page 35 Z8OQT either the increment defaults to N may be (fill block), (verify block), or greater than (fill and verify block). The ending address must be starting address. example, to specify a Quick Fill RAM memory 0000 OFFF with through data an increment of AA, do the following three operations: data...
  • Page 36 2800T Table 3-6. Quick Addresses and Status Codes Fill Verity OPERATION PARAMETERS Start Address WRITE @ XXXX=DD XXXX = Data DD = Fill Start Address WRITE @ 4X XXXX=0 XXXX = WRITE @ Address 4Y YYYY=ZN Y YYYY = Increment Test Specification: = Fill...
  • Page 37: Introduction

    ZBOQT Enter the beginning address, followed by the right—arrow key. Enter the ending address, followed by the key. right—arrow data byte in hex, followed by the Enter the right-arrow key. default other select an address step than the (Optional) ,press the right- arrow key, followed by the step (up to 15) function other than select a...
  • Page 38: Pod Drive Capability

    Z8OQT 3-30. CIock Loading The pod increases the normal load on the UUT clock. While this loading will rarely have any affect on clock it may make marginal clock sources operation, more obvious. 3-31. POD DRIVE CAPABILITY than As a driving source on the UUT bus, the provides equal to or better normal 280 current drive capability.
  • Page 39: Theory Of Operation

    ZBOQT Section Theory Operation INTRODUCTION 4-1. This section contains two block diagram descriptions of the pod. The first generalized; it describes the operating concept of the pod and the relationship of the pod to the 9000 Series or 9100 Series mainframe and the UUT. The second more detail.
  • Page 40: Processor Section

    ZBOQT INTERFACE POD PROCESSOR SECTION ”0 HANDSH/IKE LINES MICRO- PROCESSOR—— ___________ __________ MAIN TIMING FRAME SECTION INTERVAL TIMER ——>DISABLE TIMING RAM, CIRCUITS ENABLE BUFFERS RESET POWER FAILURE |_______________________I...
  • Page 41 Z8OQT DATA/ PROTECTION ADDRESS CIRCUITS BUFFERS LOGIC LEVEL SENSING STATUS SIGNALS STATUS CONTROL SIGNALS CONTROLA ENABLE. BUFFERS UUT INTERFACE SECTION MICRO- PROCESSOR SOCKET 6—— UUT CLOCK POWER SENSING POWER CIRCUIT General Block Diagram Figure 4-1.
  • Page 42 ZBOQT Interface Section 4-4. Interface The UUT Section, shown in Figure include the following 4—1, elements: Data and address buffers Protection circuits signal lines for data, Logic level detection circuits address, status and control lines data address buffers are enabled to connect the to the microprocessor Control...
  • Page 43: Uut Interface Section

    ZBOQT When the interval timer reaches timeout, the timing circuits produce output / O, and enable the buffers of the UUT Interface to disable RAM, ROM, and to control the Section. This action causes the microprocessor UUT Interface the Processor Section. At the same time, the microprocessor, Section instead for command execution, places a UUT address preparation...
  • Page 44: Lines

    ZBOQT DATA BUS (DO-D7) ‘ “ ‘ ‘ 0—7 PORT — ———— ——.I MAINSTAT CHIP SELECT ENABLE «— PORT PODSTAT ADDRESS A0-A7 BUS (AO-A15) I/o. RAM, INTERVAL TIMER <,< EMULATOR U16-U29 < § MICRO- PROCESSOR DISABLE I— STATUS LINES SIGNALS DRIVE BUFFERS (CONTROL)
  • Page 45 ZSOQT CLOCK +4.3v POWER —> PROTECTION SOURCE/ SINK CIRCUITS A1,A4, +0.7v ‘1 +4.3v—b DATf BDO—BD7 DATA 49,9 ‘ BUFFER *SYNC +0.7v I-DIR- LDO»LD7 ECTIONAL) LATCHES —._¢. “EN HOLD — "EN CIIRCCVJIT UUT°—" ”‘2 20535.5? ADDRESS BA15 U3, U5 SYNC +0.7v_ ‘...
  • Page 46 ZBOQT Processormonitors handshake line, MAINSTAT, at waiting port for mainframe addresses commands. The microprocessor port by means of address address lines decoder, U31. The address decoder decodes A0—A7 A12-Al4 to produce that address lines selects either the RAM, signal O, or Interval Timer. mainframe places a low on the MAINSTAT line when a command placed...
  • Page 47 ZBOQT Address buffers, U8 and Sensing latches, U2, U4, U6, Hold low circuit, U12 and associated components, to hold address lines at 0000 when the UUT not accessed U10 for protection circuits source/sink Power Interface Section Data Lines 4-10. disabled by the timing circuits whenever the micro- Data Buffer Ul data...
  • Page 48 ZBOQT >Q<mm bum—0mm QwOqu>>02¥0< <55 828% ._.a:m0m_m QmOij>>OZ¥O< 0... <._.<Q ‘ mthOImmamDOmh MESH—".225. Dm>_m_0m_m <P<D NEMI DZ<_>:>_OO 20¢". <P<O 0... mo“. <55 <h<o DO...— wmmI >o<mm 0232200 Eomn. <h<o man—252.200 .r<._.mQOn_ ._.<._.wDOn. F<sz_<_>_ F<FWZ_<—>_ 4-3. Handshaklng Signals Flgure 4-10...
  • Page 49 ZBOQT READ/WRITE—«rIt-M1 :‘F |T2| TalTl 1“ REFRESH ADDRESSX DRESS MEMORY AO—A1 ADDRESS F_‘l 00-07 READ SYNC LATCH UUT ON DATA DO-D7 \‘ILVRITE .< £77! LATCH ‘UUT ON MAINFRAM SYNC OUT Signal and Latch Times 4-4. UUT ON Figure...
  • Page 50: Uut Interface Section

    Z8OQT 4-11. Interface Section Address Lines to that data lines, all UUT addresses are fed In a similar described for the manner of protection circuits equipped with resistors and clipping a series through diodes. The diodes used to the address lines perform the additional protect function of holding the address lines...
  • Page 51: Timing Section

    ZBOQT Section 4-13. Timing the interval timer contained in U25 and The timing section consists and a U26, timing circuits made up and U12. As mentioned in the series the Processor Section, the microprocessor executes the mainframe description timer command by first setting the interval and then all necessary...
  • Page 52 ZBOQT utilize the pod microprocessor in WAIT are enabled, allowing the UUT inputs the microprocessor removed facilitate pod connection. place RESET The RUN UUT mode continues until a received from the signal from RESET mainframe mainframe. The causes the microprocessor signal control of Processor...
  • Page 53: Maintenance

    ZBOQT Section Maintenance 5-1. INTRODUCTION informationfor This section provides maintenance the pod, and includes self information, repair precautions, disassembly procedures, and trouble- test shooting information. SELF TEST 5-2. The 9000 Series Series mainframe can perform a self test on any pod 9100 which enough to communicate with the mainframe.
  • Page 54 ZSOQT clock signal applied to the clock input of the pod. This clock signal replaces the clock normally supplied by the UUT to operate the pod. forcing lines and are set to the active state. Setting these interrupts lines allows testing of the individual hardware or software buffering.
  • Page 55 Z8OQT Failure Code Summary Table 5-1. Sell Test 9000-SERIES POD SELF TEST FAILURE CODE DESCRIPTION read access failed access UUT write failed cannot be Control lines driven Enableable status line(s) failed 9100-SERIES POD SELF TEST FAILURE CODE DESCRIPTION Read access failure access Write...
  • Page 56: Repair Precautions

    ZSOQT 5-3. REPAIR PRECAUTIONS CAUTION Static components contained discharge can damage the pod. prevent this possibility, take the following pre- and/ cautions when troubleshooting or repairing the unit. disconnect PCB (printed Never remove, install, otherwise connect without from circuit assemblies disconnecting the pod board) mainframe.
  • Page 57: Selecting A Uut For Pod Testing

    Fluke Service Center recommended. Refer to the mainframe Service Manual Fluke Service Centers. for a list Pod Detective Inoperative? 5-6.
  • Page 58 ZBOQT ..fiwfiLfifigfififi “ (51% fiafigggifii §a§@$$w w” gé§fii§ éimwfiam: fin; aagaww awmmawafi ,kgg lntertace PCB, Non-Component Side 5-1. Flgure...
  • Page 59 Z$OQT If the result of a self test, any other mainframe operation produces a pod timeout message, the pod considered to be inoperative. Troubleshoot an under inoperative pod as described the heading Troubleshooting an Inoperative under Pod. Select a suitable UUT as described Selecting a UUT for heading Pod Testing.
  • Page 60 Z8OQT Insert the modified IC socket into the self test socket. connector into ribbon the modified IC socket. cable Insert the ribbon addition to cable connector, be sure to effectively modifying the and set all forcing line and disable all line and interrupt forcing...
  • Page 61 ZBOQT Table Recreating Sell Test Routines 5-3. 9000-SERIES POD SELF TEST OPERATOR ACTIONS TO FAILURE POD OPERATION RECREATE TEST CODE Reset Power Cycle @ 0FFO READ OFFO = OF READ error message occurs, check powerfail the power detection circuits.) NOTE WRITE @ WRITE @ OFFO...
  • Page 62: Recreating Self Test Routines

    ZBOQT Test Routines Table 5-3. Self Recreating (cont) 9100-SERIES POD SELF TEST FAILURE OPERATOR ACTIONS CODE POD OPERATION RECREATE TEST data 00004 Write WRITE SPECIAL ADDR special DATA FB TO address 00000004 data SPECIAL ADDR 00008 Write special WRITE DATA address 00000008 data...
  • Page 63: Troubleshooting A Defective Pod

    Z8OQT Recreating Sell Test Routines (cont) Table 5-3. 9100 -SERIES POD SELF TEST OPERATOR ACTIONS TO FAILURE POD OPERATION RECREATE TEST CODE data Write WRITE FFFF FF, high DATA TO ADDFI I/O space address ADDR OPTION: HQ cable check that pod test and the 2001 None;...
  • Page 64 Z8OQT NOTE the most When troubleshooting pod, perform looping tests ROM and simple type (such as reads writes as Opposed to reveal afault synchronizedprobe tests) to symptom. used fault it isolated. then be once such a looping test to trace a 5-9.
  • Page 65 ZBOQT timer and timing circuits Check for interval operation 2f_the each time a read (IRQ) observing pin a low-going output executed. If the present, check a SYNC operation signal the shielded cable and for a UUT ON signal signal at pin connector, the PCB-to-PCB connector.
  • Page 66: 5-13. Troubleshooting An Inoperative Pod

    Z8OQT operation of Check for the interval timer and timing circuits by each time a write output observing pin a low-going If the present, check a SYNC operation executed. signal and for a UUT ON signal the shielded cable signal connector, PCB-to-PCB connector.
  • Page 67 Z8OQT Remove the microprocessor from its socket. under Connect the pod test power supplies. Apply connector normally the mainframe; coupled pins power and pin for ground. available, use a +5V, -5V, second mainframe and shielded cable to provide self test power to the pod.
  • Page 68 ZSOQT VOLT VOLT —5 SUPPLY SUPPLY INOPERATIVE TROUBLESHOOTER SECOND PROBE Troubleshooting an lnoperatlve Pod Figure 5-3. 5—16...
  • Page 69 ZSOQT Addresses Table 5-4. ZBOQT Memory ADDRESSABLE DEVICE ADDRESS (HEX) 2000 207F — 0000 (See Table 1FFF 5-5) l/O-Port Direction Register 2081 2080 -Port Data Register -Port Direction 2083 Register -Port 2082 Data Register 2090 Interval Timer Divide by Interval Timer Disable 2094 latch Address...
  • Page 70 Center the mainframe Service Manual Fluke Service recommended. Refer for a list of Fluke Service Centers. 5-18...
  • Page 71: Disassembly

    613828. Make sure Fluke adapter, part correct pin—to-pin relationships are maintained. 5-19...
  • Page 73 PARTS OBTAIN 6-2. Components may be ordered directly from the manufacturer’s part number, or John Fluke Mfg. Co., Inc. or an authorized representative by using the from the FLUKE STOCK NUMBER.
  • Page 74 This kit contains items listed in the REC QTY column for the lists in quantities recommended. parts information John Parts available from the Fluke Mfg. Co., Inc. or price Fluke Parts representative. Prices are also available in a Replacement Catalog, which available upon request.
  • Page 75 ZBOQT ¢ INHO IIIII mmNB mmmzbz mmmmDHU<sz¢z UHmmzmu Hm<m mvamw mommow omovmw mwmmhm mrmmhm meNmm wormmm mhwwwm homwvw mHmem h¢¢mmw vammm Hm¢mmm hppmmw mmHNmm NMHNmH mHmmmH Huwmmw vmmmom mam: IWQOUI memm wmmmm wmmmm wmmmw wmmmm wmmmm wmmmm mmmmm wmmmw wmmmm wmmmm wmmmm wmmmm...
  • Page 76 Z8OQT MP10 9000A-Z8OQT-5071 6-1. 9000A-2800T Intertace Pod Figure Final Assembly...
  • Page 77 ZSOQT HHHHHHHHHHHHH le-‘HHHMNI-IQ fiHmHHNNI—IMMHHHNHHN INFO IIIII mmNB mmmSDZ mmHMDBUthzmz UHMmZmU HNHIZmemmxu BOflmNHmAvhz HOflvwmAvrm Hawvwmg¢>z BQNHHmAsz Mlommnwlfl HQVOMAVPZ Hamomavbz HDVODUHAVF Bm<m Qmmmqvhz Racehv>z mmvomm vmmwow mmmmwh h¢>oam mmvmmm oaammm mwmwom rmmhvh ommmwh mmammm muorom ovmwom Nmmowb Hmvwwh Hammvh Nmmmmm mdmz IMQOUI mnhoo memm vawH...
  • Page 78 ZBOQT HHHHHH NHHl-il—IHHHH I»HO IIIII mmMB mmmZDz UHmwsz mummDBU<sz<2 m39v>me<¢FZm wOHImwNmQHQ woalmovaHQ moalmommAHo HQmMHmQ¢nz HQoomHVFZ Hm<m QbNmAVFZ mMmOVP N¢vmmw owommv Mukm mmhz ImQOUI vawH vawH vmmma mmNHo wmmmm mmmmm wwmmo Nwmmo Nwmmo mmmam Emuomwo .uumm xuoem mxoqm --oz-- mmmmmp mmmovn ~¢¢mmm mumo«h ~m~m~¢...
  • Page 79 ZBOQT \LHUHthmI—w 3330 IImII hum—dam DHhckw Hmam mFmE-EE «a ml& 5H“. gun». 9000A— 2800T' 1601 Processor PCB Assembly 6-2. A11 Figure...
  • Page 80 ZBOQT r-II-(HI-l HHHHHH HHNHmI—IHHHNHHNHHMLD [who IIIII mmflh >omEVNNDmNI>NHIHNHmmm mmmEDz WMMMDfiodez¢Z UHmmzmu fidmmmooxmoanmmfl Smoalooofilmflvm flmmUthOHUONMU H¢mHooxw0Hommfl z¢mvaA¢v>2m z<>wmma¢>2m 2vbmauzv>02 mommmml¢la moowmmIVIH ZmMHmHvPZm ZOVHWVFZm Nmmmmlle Nxflmmlvlfi Hmflm flammlvlfi mvvaH mmmmwm whvmmm «Noufim Hmomwm owwmwm HMbhom mawwow mmmwmb moomoa ¢maawm Numm mmhz IMQOUI wovam hmmmo memm...
  • Page 81 ZBOQT INHO ItlllmeH mmmzaz mummDhU¢mnz¢2 UHmmsz wOHImONMRHQ Qmm0<|mHN mfiQINhHOH Bm<m «00 mum: xqmm Imoool thFO womam Nwmmo .uuwa mxaam xooam -uozus Hmvvmv Hmvvmw wmmmav mufimhfi ..u:ou.>ansumw< m>H¢HmcmmloHumum A.m:w :1---:uu-u----onamHmummouuulu m<a~eznoz oommuoucH mmumo«@:« musuam wmmv cfisfioo mosmHmzmmB.mmu<mm .MIw ou.vH.amxoom mH.oH.ameOm ..‘m.
  • Page 82 ZBOQT <1 >- m> ‘5”: 2“2 0(1- :°B a?” ”a: N’o': ‘9 <1 ® ‘5.’ <1 fie» 2:.-- ‘1 @— 9000A-280-1672 Interface PCB Assembly 6-3. A12 Figure...
  • Page 83 ZBOQT Section Schematic Diagrams CONTENTS TABLE OF TITLE FIGURE PAGE ........ Processor PCB Assembly 7-1........A12 Interface PCB Assembly 7-2.
  • Page 84 Z8OQT mwmdwwwwmi 2::asfiéfi MLVLSI‘IQ 23333329”...
  • Page 85 ZBOQT QLVLSNXVI %’ Processor PCB Assembly 7-1. A11 Figure...
  • Page 86 ZBOQT ‘m«v 02¢ mmmcaa 5:5. taxman tho“ 35me hww»m4mm mu< m«< uw< m< ixu<m3m Chum! 55¢:...
  • Page 87 ZBOQT J_<L thhKme xzw<h<n ahmmwzm taxmamm iku<xn xx<m=n IkJ<I 22b: lzmur zwzbu *«x mzornu<l<u Ifll Uu> ml“ mm(m>m «manna Processor 7-1. A11 Assembly (cont) Flgure...
  • Page 88 2800T OUTPUTS LOl‘ Lfl INPUTS (U27) LOGIC Processor 1-1. A11 PCB Assembly (cont) Flgure...
  • Page 89 ZBOQT PINS DEVICE Processor 7-1. A11 Assembly (cont) Figure 7—7...
  • Page 90 Z8OQT SELF HOLD BUSAK fi C\,2,5,‘| .22A; 0531 00.463 _____________ tzaF -22L; 7—8...
  • Page 91 ZBOQT wTfi OTHERWISE SPECIFIED Au “51510535 OHMS,l/1w.5CL. ARE IN CAPACITORS ARE MICROFARADS A‘E J,“ UD‘I UAqs UAIO UAII 50>®bN—wu1 UNI: UA|5 MM§9$ CIGIOOO 9F "ALEZQ'J fl 9000A-Z80-1072 lnterlace 7-2. A12 Flgure Assembly 7-9/ 7-10...
  • Page 93 ZBOQT Appendix from TL/1 Z8OQT Using Programs READING THE VERSION NUMBER A-1. DATABASE database contained in a disk 9100-Series file ZSOQT contains information that Mainframe. The disk file determines the Pod’s the system. read the version number interface to the rest the database from front...
  • Page 94 ZBOQT commands for the program demonstrates syntax use in The following statement. podsetup NOTE “ $ hexadecimaldata character. ”prefix requires a setup program This program function example of podsetup with Pod—specific setup parameters. IMPORTANT NOTES: strings insensitive. character case Standard Podaspecificl setups with single~quoted...
  • Page 95 Z8OQT Pod Sync Calibration A-7. Data Calibration internal the process by which the delay lines in the Module Probe are adjusted to correctly align (in time) the clock and signals calibrate an or Probe Module to a Pod sampled. a particular Pod sync mode, you are prompted to probe a signal on the UUT.
  • Page 96 ZBOQT Pod Sync Calibration Data Table A-2. ZBOQT SYNC MODE UUT SIGNAL EDGE OF SIGNAL OFFSET FROM EDGE ADDR Rising R_—Q DATA Rising Available A-8. TL/1 Support Programs available The following list describes the TL/l for the support programs Pod. Z80QT QWK_F|LL This...
  • Page 97 ZBOQT FUNCTION This determines whether the Quick Fill program performs a Quick Fill, a Quick Verify, or a Quick Fill and The values 1,2, specify the Verify. test type, respectively. All other values are illegal. Faults: tesLaborted: “Illegal address in invocation”. This fault included for reason FILL...
  • Page 98 Z8OQT that found”. The current address space reason “Space fault program. This mainframe known by should never be raised in normal operation. test_failed: “Data data written does does match”. The match reason data read back the verify cycle. during uut_address The address at which the fault occurred.
  • Page 99 ZSOQT FUNCTION This determines whether the Quick RAM program performs a Quick Pattern are the test type, test Verify. The values or a Quick other values are illegal. respectively. Faults: test_aborted: fault “Illegal address in invocation”. This included for reason consistency with the way 9000 series testers handle the Quick RAM program and should never be seen in normal operation.
  • Page 100 ZBOQT Slots: uut__address The address at which the fault occurred data that data_expected was expected — data_read data that was read — bad_data__mask data bits The hex mask the bad ofthe Manual See the 9100-Series TL/l for a list Reference Fault Conditions.
  • Page 101 ZBOQT Arguments: ADDR This the starting address the Quick test. The allowed range of through FFFF. for ADDR values is 0 UPTO This the ending address of the Quick ROM test. The allowed range of FFFF. UPTO greater than ADDR. values for UPTO must be is 0...
  • Page 102 Z8OQT command entered”. A new command was entered “New reason fault the Quick ROM test. This should the execution during control of never be raised because the in complete program mainframe while it executing. that current found”. The address space “Space reason fault...
  • Page 103 ZBOQT “Illegal data". The value DATA does conform to the reason restrictions detailed above. “Illegal space”. The current address space not legal for reason this test. that found”. The current address space reason “Space mainframe not known by the program. This fault should never be raised in normal operation.
  • Page 104 ZBOQT A-10. Faull Masks Definitions of Tables through A-6 describe the from specific Z80QT pod signals mapping A—3 to bit positions in the 64-bit fault masks generated by the built-in functions when fault they invoke format handlers. In each unmapped positions example, to maintain...
  • Page 105 ZSOQT Masks Table A-4. Data Signal Mapping to Fault signal lault mask format: Data "000000000000000000000000000000000000000000000OOOOOOOOXXXXXXXXX" mask fault assignments: Data signal Mask Pin No. Signal unused Signal Mapping to Fault Masks Table A-5. Control mask fault format: Control signal "000000000000000000000000000000000000000000000 OOOOOOOOXXXXXXXXX" Bit 7 mask Control...
  • Page 106 ZSOQT Table Status Signal Mapping to Fault Masks A-6. Status signal mask fault lormat: "000000O0000000000000000000O00000000000OOOOOOOXXXXXXXXXXXXXXXX" Bit 7 Status signal mask fault assignments: Mask Pin No. Signal VVAFT BUSRQ RESET \lmLh-bODNA unused unused PWRFNL unused A-14...
  • Page 107 ZSOQT information The following program summarizes the the previous tables and provides examples with syntax and format. faults program _______ faults examples of raising This program each of built—in primitive shows specific associated requiring with the mask arguments pod. 9006A-ZHOQT this fault is executed,...

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