Using A Shifted Input Range - Caen V1729 Technical Information Manual

4 channel/12bit sampling adc

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User's Manual (MUT)

Mod. V1729 4 Channel 12 Bit Sampling ADC

4.5.8

The input signal range is defined by default to be +/-0.5V. In order to shift it, one has to

make use of free CMS-805 foot-prints located around the M3 amplifier (LM4130), itself

located between the MATACQ chip and the ADC (ADS803E). The equipment map of this

zone of the board is shown below.

To shift the baseline downwards in order to deal with mainly negative pulses, mount R64

and R66.

To shift the baseline upwards in order to deal with mainly positive pulses, mount R63 and

R65.

The values of those two 1%-precision resistors must be identical. The range is saturated

with 2k: that is therefore the minimum value. The tabulation below displays the different

resistor values necessary to obtain the targeted shifts.

It is also necessary to shift the fixed reference of the vernier (VerRef2) in order to

compensate for the preceding operation at the level of the latter. Therefore, one has to

modify the value of the resistor R14 (see figure below) which is 18k by default. It realizes

a dividing bridge with R15 (20k) located just below. One has actually to shift the middle of

that bridge with a voltage proportional to the shift aimed at on the signal itself. The values

necessary for R14 thus also appear in the tabulation below.

Input range pos -neg

90% -10%

80% -20%

70% -30%

60% -40%

50% -50%

40% -60%

30% -70%

20% -80%

10% -90%

NPO:

00109/04:V1729.MUTx/03