Block Diagram - Denon DCD-A100 Service Manual

M3062LFGPGP (310040: IC502)
P1
P1
P1
P0 /AN
7
P0 /AN
6
P0 /AN
5
P0 /AN
4
P0 /AN
3
P0 /AN
2
P0 /AN
1
P0 /AN
0
P10 /AN
7
P10 /AN
6
P10 /AN
5
P10 /AN
4
P10
P10
P10
P10
P9 /AD
7 TRG
P9 /ANEX1/S
6
P9 /ANEX0/CLK4
5

Block Diagram

8
Port P0
Internal peripheral functions
Output (timer A): 5
Input (timer B): 6
Three-phase motor
control circuit
Watchdog timer
D-A converter
(8 bits X 2 channels)
<V
Port P11
(Note 3)
8
75 74 73 72 71 70 69
/D
76
2 10
77
/D
1 9
/D 78
0 8
79
/D
07 7
/D 80
06 6
/D 81
05 5
82
/D
04 4
/D 83
03 3
/D
84
02 2
/D
01 1 85
/D
00 0 86
/KI
87
7 3
/KI 88
6 2
/KI
89
5 1
KI 90
4/ 0
/AN
3 3 91
/AN
92
2 2
93
/AN
1 1
94
AV
SS
95
/AN
0 0
96
V
REF
97
AVcc
98
/S 4
IN
99
4
OUT
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
8 8
Port P1 Port P2
<V ports>
CC2
A-D converter
(10 bits
Timer (16-bit)
Expandable up to 26 channels)
clock synchronous serial I/O
(8 bits
CRC arithmetic circuit (CCITT )
(Polynomial : X
M16C/60 series16-bit CPU core
(15 bits)
R0H
R1H
DMAC
(2 channels)
ports> <V
CC1
Port P14
Port P12
(Note 3) (Note 3)
2 8
68 67 66 65 64 63 62 61 60 59 58 57
56
M16C/62P Group
8 8
Port P3 Port P4 Port P5
System clock generator
8 channels
X
PLL frequency synthesizer
UART or
3 channels) Clock synchronous serial I/O
X
(8 bits
16 12 5
+X +X +1)
R0L
SB
R1L
USP
R2
ISP
R3
INTB
A0
PC
A1
FLG
FB
ports>
CC2
Port P13
(Note 3)
Note 1: ROM size depends on microcomputer type.
8
Note 2: RAM size depends on microcomputer type.
Note 3: Ports P11 to P14 exist only in 128-pin version.
59
55 54 53 52 51
50
P4 /A
2 18
49
P4 /A
3 19
48
P4 /CS0
4
47
P4 /CS1
5
46
P4 /CS2
6
45
P4 /CS3
7
44
P5 /WRL/WR
0
43
P5 /WRH/BHE
1
42
P5 /RD
2
41 P5 /BCLK
3
40 P5 /HLDA
4
39 P5 /HOLD
5
38 P5 /ALE
6
37 P5 /RDY/CLK
7
36
P6 /CTS
0 0
35 P6 /CLK
1 0
34 P6 /RxD /SCL
2 0
33 P6 /T D /SDA
3 X 0
32 P6 /CTS
4 1
31 P6 /CLK
5 1
30
P6 /RxD
6 1
29
P6 /T D /SDA
7 X 1
28
P7 /T D /SDA
0 X 2
27 P7 /RxD
1 2
26
P7 /CLK
2 2
8
8
Port P6
<V ports>
CC1
X -X
IN OUT
X -X
CIN COUT
Ring oscillator
2 channels)
X
Memory
ROM
(Note 1)
RAM
(Note 2)
Multiplier
OUT
/RTS
0
0
0
/RTS /CTS /CLKS
1 0 1
/SCL
1
1
/TA0 (Note)
2 OUT
/SCL /TA0 /TB5 (Note)
2 IN IN
/TA1 /V
OUT